1* Arcx Anybus-S controller 2 3This chip communicates with the SoC over a parallel bus. It is 4expected that its Device Tree node is specified as the child of a node 5corresponding to the parallel bus used for communication. 6 7Required properties: 8-------------------- 9 10 - compatible : The following chip-specific string: 11 "arcx,anybus-controller" 12 13 - reg : three areas: 14 index 0: bus memory area where the cpld registers are located. 15 index 1: bus memory area of the first host's dual-port ram. 16 index 2: bus memory area of the second host's dual-port ram. 17 18 - reset-gpios : the GPIO pin connected to the reset line of the controller. 19 20 - interrupts : two interrupts: 21 index 0: interrupt connected to the first host 22 index 1: interrupt connected to the second host 23 Generic interrupt client node bindings are described in 24 interrupt-controller/interrupts.txt 25 26Optional: use of subnodes 27------------------------- 28 29The card connected to a host may need additional properties. These can be 30specified in subnodes to the controller node. 31 32The subnodes are identified by the standard 'reg' property. Which information 33exactly can be specified depends on the bindings for the function driver 34for the subnode. 35 36Required controller node properties when using subnodes: 37- #address-cells: should be one. 38- #size-cells: should be zero. 39 40Required subnode properties: 41- reg: Must contain the host index of the card this subnode describes: 42 <0> for the first host on the controller 43 <1> for the second host on the controller 44 Note that only a single card can be plugged into a host, so the host 45 index uniquely describes the card location. 46 47Example of usage: 48----------------- 49 50This example places the bridge on top of the i.MX WEIM parallel bus, see: 51Documentation/devicetree/bindings/bus/imx-weim.txt 52 53&weim { 54 controller@0,0 { 55 compatible = "arcx,anybus-controller"; 56 reg = <0 0 0x100>, <0 0x400000 0x800>, <1 0x400000 0x800>; 57 reset-gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>; 58 interrupt-parent = <&gpio1>; 59 interrupts = <1 IRQ_TYPE_LEVEL_LOW>, <5 IRQ_TYPE_LEVEL_LOW>; 60 /* fsl,weim-cs-timing is a i.MX WEIM bus specific property */ 61 fsl,weim-cs-timing = <0x024400b1 0x00001010 0x20081100 62 0x00000000 0xa0000240 0x00000000>; 63 /* optional subnode for a card plugged into the first host */ 64 #address-cells = <1>; 65 #size-cells = <0>; 66 card@0 { 67 reg = <0>; 68 /* card specific properties go here */ 69 }; 70 }; 71}; 72