1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _ASM_X86_TEXT_PATCHING_H
3 #define _ASM_X86_TEXT_PATCHING_H
4
5 #include <linux/types.h>
6 #include <linux/stddef.h>
7 #include <asm/ptrace.h>
8
9 struct paravirt_patch_site;
10 #ifdef CONFIG_PARAVIRT
11 void apply_paravirt(struct paravirt_patch_site *start,
12 struct paravirt_patch_site *end);
13 #else
apply_paravirt(struct paravirt_patch_site * start,struct paravirt_patch_site * end)14 static inline void apply_paravirt(struct paravirt_patch_site *start,
15 struct paravirt_patch_site *end)
16 {}
17 #define __parainstructions NULL
18 #define __parainstructions_end NULL
19 #endif
20
21 /*
22 * Currently, the max observed size in the kernel code is
23 * JUMP_LABEL_NOP_SIZE/RELATIVEJUMP_SIZE, which are 5.
24 * Raise it if needed.
25 */
26 #define POKE_MAX_OPCODE_SIZE 5
27
28 struct text_poke_loc {
29 void *detour;
30 void *addr;
31 size_t len;
32 const char opcode[POKE_MAX_OPCODE_SIZE];
33 };
34
35 extern void text_poke_early(void *addr, const void *opcode, size_t len);
36
37 /*
38 * Clear and restore the kernel write-protection flag on the local CPU.
39 * Allows the kernel to edit read-only pages.
40 * Side-effect: any interrupt handler running between save and restore will have
41 * the ability to write to read-only pages.
42 *
43 * Warning:
44 * Code patching in the UP case is safe if NMIs and MCE handlers are stopped and
45 * no thread can be preempted in the instructions being modified (no iret to an
46 * invalid instruction possible) or if the instructions are changed from a
47 * consistent state to another consistent state atomically.
48 * On the local CPU you need to be protected against NMI or MCE handlers seeing
49 * an inconsistent instruction while you patch.
50 */
51 extern void *text_poke(void *addr, const void *opcode, size_t len);
52 extern void *text_poke_kgdb(void *addr, const void *opcode, size_t len);
53 extern int poke_int3_handler(struct pt_regs *regs);
54 extern void text_poke_bp(void *addr, const void *opcode, size_t len, void *handler);
55 extern void text_poke_bp_batch(struct text_poke_loc *tp, unsigned int nr_entries);
56 extern int after_bootmem;
57 extern __ro_after_init struct mm_struct *poking_mm;
58 extern __ro_after_init unsigned long poking_addr;
59
60 #ifndef CONFIG_UML_X86
int3_emulate_jmp(struct pt_regs * regs,unsigned long ip)61 static inline void int3_emulate_jmp(struct pt_regs *regs, unsigned long ip)
62 {
63 regs->ip = ip;
64 }
65
66 #define INT3_INSN_SIZE 1
67 #define CALL_INSN_SIZE 5
68
int3_emulate_push(struct pt_regs * regs,unsigned long val)69 static inline void int3_emulate_push(struct pt_regs *regs, unsigned long val)
70 {
71 /*
72 * The int3 handler in entry_64.S adds a gap between the
73 * stack where the break point happened, and the saving of
74 * pt_regs. We can extend the original stack because of
75 * this gap. See the idtentry macro's create_gap option.
76 */
77 regs->sp -= sizeof(unsigned long);
78 *(unsigned long *)regs->sp = val;
79 }
80
int3_emulate_call(struct pt_regs * regs,unsigned long func)81 static inline void int3_emulate_call(struct pt_regs *regs, unsigned long func)
82 {
83 int3_emulate_push(regs, regs->ip - INT3_INSN_SIZE + CALL_INSN_SIZE);
84 int3_emulate_jmp(regs, func);
85 }
86 #endif /* !CONFIG_UML_X86 */
87
88 #endif /* _ASM_X86_TEXT_PATCHING_H */
89