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1 /*
2  * Copyright 2015 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: AMD
23  *
24  */
25 
26 /**
27  * This file defines external dependencies of Display Core.
28  */
29 
30 #ifndef __DM_SERVICES_H__
31 
32 #define __DM_SERVICES_H__
33 
34 #include "amdgpu_dm_trace.h"
35 
36 /* TODO: remove when DC is complete. */
37 #include "dm_services_types.h"
38 #include "logger_interface.h"
39 #include "link_service_types.h"
40 
41 #undef DEPRECATED
42 
43 irq_handler_idx dm_register_interrupt(
44 	struct dc_context *ctx,
45 	struct dc_interrupt_params *int_params,
46 	interrupt_handler ih,
47 	void *handler_args);
48 
49 
50 /*
51  *
52  * GPU registers access
53  *
54  */
55 uint32_t dm_read_reg_func(
56 	const struct dc_context *ctx,
57 	uint32_t address,
58 	const char *func_name);
59 /* enable for debugging new code, this adds 50k to the driver size. */
60 /* #define DM_CHECK_ADDR_0 */
61 
62 #define dm_read_reg(ctx, address)	\
63 		dm_read_reg_func(ctx, address, __func__)
64 
65 
66 
67 #define dm_write_reg(ctx, address, value)	\
68 	dm_write_reg_func(ctx, address, value, __func__)
69 
dm_write_reg_func(const struct dc_context * ctx,uint32_t address,uint32_t value,const char * func_name)70 static inline void dm_write_reg_func(
71 	const struct dc_context *ctx,
72 	uint32_t address,
73 	uint32_t value,
74 	const char *func_name)
75 {
76 #ifdef DM_CHECK_ADDR_0
77 	if (address == 0) {
78 		DC_ERR("invalid register write. address = 0");
79 		return;
80 	}
81 #endif
82 	cgs_write_register(ctx->cgs_device, address, value);
83 	trace_amdgpu_dc_wreg(&ctx->perf_trace->write_count, address, value);
84 }
85 
dm_read_index_reg(const struct dc_context * ctx,enum cgs_ind_reg addr_space,uint32_t index)86 static inline uint32_t dm_read_index_reg(
87 	const struct dc_context *ctx,
88 	enum cgs_ind_reg addr_space,
89 	uint32_t index)
90 {
91 	return cgs_read_ind_register(ctx->cgs_device, addr_space, index);
92 }
93 
dm_write_index_reg(const struct dc_context * ctx,enum cgs_ind_reg addr_space,uint32_t index,uint32_t value)94 static inline void dm_write_index_reg(
95 	const struct dc_context *ctx,
96 	enum cgs_ind_reg addr_space,
97 	uint32_t index,
98 	uint32_t value)
99 {
100 	cgs_write_ind_register(ctx->cgs_device, addr_space, index, value);
101 }
102 
get_reg_field_value_ex(uint32_t reg_value,uint32_t mask,uint8_t shift)103 static inline uint32_t get_reg_field_value_ex(
104 	uint32_t reg_value,
105 	uint32_t mask,
106 	uint8_t shift)
107 {
108 	return (mask & reg_value) >> shift;
109 }
110 
111 #define get_reg_field_value(reg_value, reg_name, reg_field)\
112 	get_reg_field_value_ex(\
113 		(reg_value),\
114 		reg_name ## __ ## reg_field ## _MASK,\
115 		reg_name ## __ ## reg_field ## __SHIFT)
116 
set_reg_field_value_ex(uint32_t reg_value,uint32_t value,uint32_t mask,uint8_t shift)117 static inline uint32_t set_reg_field_value_ex(
118 	uint32_t reg_value,
119 	uint32_t value,
120 	uint32_t mask,
121 	uint8_t shift)
122 {
123 	ASSERT(mask != 0);
124 	return (reg_value & ~mask) | (mask & (value << shift));
125 }
126 
127 #define set_reg_field_value(reg_value, value, reg_name, reg_field)\
128 	(reg_value) = set_reg_field_value_ex(\
129 		(reg_value),\
130 		(value),\
131 		reg_name ## __ ## reg_field ## _MASK,\
132 		reg_name ## __ ## reg_field ## __SHIFT)
133 
134 uint32_t generic_reg_set_ex(const struct dc_context *ctx,
135 		uint32_t addr, uint32_t reg_val, int n,
136 		uint8_t shift1, uint32_t mask1, uint32_t field_value1, ...);
137 
138 uint32_t generic_reg_update_ex(const struct dc_context *ctx,
139 		uint32_t addr, int n,
140 		uint8_t shift1, uint32_t mask1, uint32_t field_value1, ...);
141 
142 #define FD(reg_field)	reg_field ## __SHIFT, \
143 						reg_field ## _MASK
144 
145 /*
146  * return number of poll before condition is met
147  * return 0 if condition is not meet after specified time out tries
148  */
149 void generic_reg_wait(const struct dc_context *ctx,
150 	uint32_t addr, uint32_t mask, uint32_t shift, uint32_t condition_value,
151 	unsigned int delay_between_poll_us, unsigned int time_out_num_tries,
152 	const char *func_name, int line);
153 
154 unsigned int snprintf_count(char *pBuf, unsigned int bufSize, char *fmt, ...);
155 
156 /* These macros need to be used with soc15 registers in order to retrieve
157  * the actual offset.
158  */
159 #define dm_write_reg_soc15(ctx, reg, inst_offset, value)	\
160 		dm_write_reg_func(ctx, reg + DCE_BASE.instance[0].segment[reg##_BASE_IDX] + inst_offset, value, __func__)
161 
162 #define dm_read_reg_soc15(ctx, reg, inst_offset)	\
163 		dm_read_reg_func(ctx, reg + DCE_BASE.instance[0].segment[reg##_BASE_IDX] + inst_offset, __func__)
164 
165 #define generic_reg_update_soc15(ctx, inst_offset, reg_name, n, ...)\
166 		generic_reg_update_ex(ctx, DCE_BASE.instance[0].segment[mm##reg_name##_BASE_IDX] +  mm##reg_name + inst_offset, \
167 		n, __VA_ARGS__)
168 
169 #define generic_reg_set_soc15(ctx, inst_offset, reg_name, n, ...)\
170 		generic_reg_set_ex(ctx, DCE_BASE.instance[0].segment[mm##reg_name##_BASE_IDX] + mm##reg_name + inst_offset, 0, \
171 		n, __VA_ARGS__)
172 
173 #define get_reg_field_value_soc15(reg_value, block, reg_num, reg_name, reg_field)\
174 	get_reg_field_value_ex(\
175 		(reg_value),\
176 		block ## reg_num ## _ ## reg_name ## __ ## reg_field ## _MASK,\
177 		block ## reg_num ## _ ## reg_name ## __ ## reg_field ## __SHIFT)
178 
179 #define set_reg_field_value_soc15(reg_value, value, block, reg_num, reg_name, reg_field)\
180 	(reg_value) = set_reg_field_value_ex(\
181 		(reg_value),\
182 		(value),\
183 		block ## reg_num ## _ ## reg_name ## __ ## reg_field ## _MASK,\
184 		block ## reg_num ## _ ## reg_name ## __ ## reg_field ## __SHIFT)
185 
186 /**************************************
187  * Power Play (PP) interfaces
188  **************************************/
189 
190 /* Gets valid clocks levels from pplib
191  *
192  * input: clk_type - display clk / sclk / mem clk
193  *
194  * output: array of valid clock levels for given type in ascending order,
195  * with invalid levels filtered out
196  *
197  */
198 bool dm_pp_get_clock_levels_by_type(
199 	const struct dc_context *ctx,
200 	enum dm_pp_clock_type clk_type,
201 	struct dm_pp_clock_levels *clk_level_info);
202 
203 bool dm_pp_get_clock_levels_by_type_with_latency(
204 	const struct dc_context *ctx,
205 	enum dm_pp_clock_type clk_type,
206 	struct dm_pp_clock_levels_with_latency *clk_level_info);
207 
208 bool dm_pp_get_clock_levels_by_type_with_voltage(
209 	const struct dc_context *ctx,
210 	enum dm_pp_clock_type clk_type,
211 	struct dm_pp_clock_levels_with_voltage *clk_level_info);
212 
213 bool dm_pp_notify_wm_clock_changes(
214 	const struct dc_context *ctx,
215 	struct dm_pp_wm_sets_with_clock_ranges *wm_with_clock_ranges);
216 
217 void dm_pp_get_funcs(struct dc_context *ctx,
218 		struct pp_smu_funcs *funcs);
219 
220 /* DAL calls this function to notify PP about completion of Mode Set.
221  * For PP it means that current DCE clocks are those which were returned
222  * by dc_service_pp_pre_dce_clock_change(), in the 'output' parameter.
223  *
224  * If the clocks are higher than before, then PP does nothing.
225  *
226  * If the clocks are lower than before, then PP reduces the voltage.
227  *
228  * \returns	true - call is successful
229  *		false - call failed
230  */
231 bool dm_pp_apply_display_requirements(
232 	const struct dc_context *ctx,
233 	const struct dm_pp_display_configuration *pp_display_cfg);
234 
235 bool dm_pp_apply_power_level_change_request(
236 	const struct dc_context *ctx,
237 	struct dm_pp_power_level_change_request *level_change_req);
238 
239 bool dm_pp_apply_clock_for_voltage_request(
240 	const struct dc_context *ctx,
241 	struct dm_pp_clock_for_voltage_req *clock_for_voltage_req);
242 
243 bool dm_pp_get_static_clocks(
244 	const struct dc_context *ctx,
245 	struct dm_pp_static_clock_info *static_clk_info);
246 
247 /****** end of PP interfaces ******/
248 
249 struct persistent_data_flag {
250 	bool save_per_link;
251 	bool save_per_edid;
252 };
253 
254 /* Call to write data in registry editor for persistent data storage.
255  *
256  * \inputs      sink - identify edid/link for registry folder creation
257  *              module name - identify folders for registry
258  *              key name - identify keys within folders for registry
259  *              params - value to write in defined folder/key
260  *              size - size of the input params
261  *              flag - determine whether to save by link or edid
262  *
263  * \returns     true - call is successful
264  *              false - call failed
265  *
266  * sink         module         key
267  * -----------------------------------------------------------------------------
268  * NULL         NULL           NULL     - failure
269  * NULL         NULL           -        - create key with param value
270  *                                                      under base folder
271  * NULL         -              NULL     - create module folder under base folder
272  * -            NULL           NULL     - failure
273  * NULL         -              -        - create key under module folder
274  *                                            with no edid/link identification
275  * -            NULL           -        - create key with param value
276  *                                                       under base folder
277  * -            -              NULL     - create module folder under base folder
278  * -            -              -        - create key under module folder
279  *                                              with edid/link identification
280  */
281 bool dm_write_persistent_data(struct dc_context *ctx,
282 		const struct dc_sink *sink,
283 		const char *module_name,
284 		const char *key_name,
285 		void *params,
286 		unsigned int size,
287 		struct persistent_data_flag *flag);
288 
289 
290 /* Call to read data in registry editor for persistent data storage.
291  *
292  * \inputs      sink - identify edid/link for registry folder creation
293  *              module name - identify folders for registry
294  *              key name - identify keys within folders for registry
295  *              size - size of the output params
296  *              flag - determine whether it was save by link or edid
297  *
298  * \returns     params - value read from defined folder/key
299  *              true - call is successful
300  *              false - call failed
301  *
302  * sink         module         key
303  * -----------------------------------------------------------------------------
304  * NULL         NULL           NULL     - failure
305  * NULL         NULL           -        - read key under base folder
306  * NULL         -              NULL     - failure
307  * -            NULL           NULL     - failure
308  * NULL         -              -        - read key under module folder
309  *                                             with no edid/link identification
310  * -            NULL           -        - read key under base folder
311  * -            -              NULL     - failure
312  * -            -              -        - read key under module folder
313  *                                              with edid/link identification
314  */
315 bool dm_read_persistent_data(struct dc_context *ctx,
316 		const struct dc_sink *sink,
317 		const char *module_name,
318 		const char *key_name,
319 		void *params,
320 		unsigned int size,
321 		struct persistent_data_flag *flag);
322 
323 bool dm_query_extended_brightness_caps
324 	(struct dc_context *ctx, enum dm_acpi_display_type display,
325 			struct dm_acpi_atif_backlight_caps *pCaps);
326 
327 bool dm_dmcu_set_pipe(struct dc_context *ctx, unsigned int controller_id);
328 
329 /*
330  *
331  * print-out services
332  *
333  */
334 #define dm_log_to_buffer(buffer, size, fmt, args)\
335 	vsnprintf(buffer, size, fmt, args)
336 
dm_get_timestamp(struct dc_context * ctx)337 static inline unsigned long long dm_get_timestamp(struct dc_context *ctx)
338 {
339 	return ktime_get_raw_ns();
340 }
341 
342 unsigned long long dm_get_elapse_time_in_ns(struct dc_context *ctx,
343 		unsigned long long current_time_stamp,
344 		unsigned long long last_time_stamp);
345 
346 /*
347  * performance tracing
348  */
349 #define PERF_TRACE()	trace_amdgpu_dc_performance(CTX->perf_trace->read_count,\
350 		CTX->perf_trace->write_count, &CTX->perf_trace->last_entry_read,\
351 		&CTX->perf_trace->last_entry_write, __func__, __LINE__)
352 #define PERF_TRACE_CTX(__CTX)	trace_amdgpu_dc_performance(__CTX->perf_trace->read_count,\
353 		__CTX->perf_trace->write_count, &__CTX->perf_trace->last_entry_read,\
354 		&__CTX->perf_trace->last_entry_write, __func__, __LINE__)
355 
356 
357 /*
358  * Debug and verification hooks
359  */
360 
361 void dm_dtn_log_begin(struct dc_context *ctx,
362 	struct dc_log_buffer_ctx *log_ctx);
363 void dm_dtn_log_append_v(struct dc_context *ctx,
364 	struct dc_log_buffer_ctx *log_ctx,
365 	const char *msg, ...);
366 void dm_dtn_log_end(struct dc_context *ctx,
367 	struct dc_log_buffer_ctx *log_ctx);
368 
369 #endif /* __DM_SERVICES_H__ */
370