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1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3  * Common library for ADIS16XXX devices
4  *
5  * Copyright 2012 Analog Devices Inc.
6  *   Author: Lars-Peter Clausen <lars@metafoo.de>
7  */
8 
9 #ifndef __IIO_ADIS_H__
10 #define __IIO_ADIS_H__
11 
12 #include <linux/spi/spi.h>
13 #include <linux/interrupt.h>
14 #include <linux/iio/types.h>
15 
16 #define ADIS_WRITE_REG(reg) ((0x80 | (reg)))
17 #define ADIS_READ_REG(reg) ((reg) & 0x7f)
18 
19 #define ADIS_PAGE_SIZE 0x80
20 #define ADIS_REG_PAGE_ID 0x00
21 
22 struct adis;
23 struct adis_burst;
24 
25 /**
26  * struct adis_data - ADIS chip variant specific data
27  * @read_delay: SPI delay for read operations in us
28  * @write_delay: SPI delay for write operations in us
29  * @cs_change_delay: SPI delay between CS changes in us
30  * @glob_cmd_reg: Register address of the GLOB_CMD register
31  * @msc_ctrl_reg: Register address of the MSC_CTRL register
32  * @diag_stat_reg: Register address of the DIAG_STAT register
33  * @status_error_msgs: Array of error messgaes
34  * @status_error_mask:
35  */
36 struct adis_data {
37 	unsigned int read_delay;
38 	unsigned int write_delay;
39 	unsigned int cs_change_delay;
40 
41 	unsigned int glob_cmd_reg;
42 	unsigned int msc_ctrl_reg;
43 	unsigned int diag_stat_reg;
44 
45 	unsigned int self_test_mask;
46 	bool self_test_no_autoclear;
47 	unsigned int startup_delay;
48 
49 	const char * const *status_error_msgs;
50 	unsigned int status_error_mask;
51 
52 	int (*enable_irq)(struct adis *adis, bool enable);
53 
54 	bool has_paging;
55 };
56 
57 struct adis {
58 	struct spi_device	*spi;
59 	struct iio_trigger	*trig;
60 
61 	const struct adis_data	*data;
62 	struct adis_burst	*burst;
63 
64 	struct mutex		txrx_lock;
65 	struct spi_message	msg;
66 	struct spi_transfer	*xfer;
67 	unsigned int		current_page;
68 	void			*buffer;
69 
70 	uint8_t			tx[10] ____cacheline_aligned;
71 	uint8_t			rx[4];
72 };
73 
74 int adis_init(struct adis *adis, struct iio_dev *indio_dev,
75 	struct spi_device *spi, const struct adis_data *data);
76 int adis_reset(struct adis *adis);
77 
78 int adis_write_reg(struct adis *adis, unsigned int reg,
79 	unsigned int val, unsigned int size);
80 int adis_read_reg(struct adis *adis, unsigned int reg,
81 	unsigned int *val, unsigned int size);
82 
83 /**
84  * adis_write_reg_8() - Write single byte to a register
85  * @adis: The adis device
86  * @reg: The address of the register to be written
87  * @value: The value to write
88  */
adis_write_reg_8(struct adis * adis,unsigned int reg,uint8_t val)89 static inline int adis_write_reg_8(struct adis *adis, unsigned int reg,
90 	uint8_t val)
91 {
92 	return adis_write_reg(adis, reg, val, 1);
93 }
94 
95 /**
96  * adis_write_reg_16() - Write 2 bytes to a pair of registers
97  * @adis: The adis device
98  * @reg: The address of the lower of the two registers
99  * @value: Value to be written
100  */
adis_write_reg_16(struct adis * adis,unsigned int reg,uint16_t val)101 static inline int adis_write_reg_16(struct adis *adis, unsigned int reg,
102 	uint16_t val)
103 {
104 	return adis_write_reg(adis, reg, val, 2);
105 }
106 
107 /**
108  * adis_write_reg_32() - write 4 bytes to four registers
109  * @adis: The adis device
110  * @reg: The address of the lower of the four register
111  * @value: Value to be written
112  */
adis_write_reg_32(struct adis * adis,unsigned int reg,uint32_t val)113 static inline int adis_write_reg_32(struct adis *adis, unsigned int reg,
114 	uint32_t val)
115 {
116 	return adis_write_reg(adis, reg, val, 4);
117 }
118 
119 /**
120  * adis_read_reg_16() - read 2 bytes from a 16-bit register
121  * @adis: The adis device
122  * @reg: The address of the lower of the two registers
123  * @val: The value read back from the device
124  */
adis_read_reg_16(struct adis * adis,unsigned int reg,uint16_t * val)125 static inline int adis_read_reg_16(struct adis *adis, unsigned int reg,
126 	uint16_t *val)
127 {
128 	unsigned int tmp;
129 	int ret;
130 
131 	ret = adis_read_reg(adis, reg, &tmp, 2);
132 	*val = tmp;
133 
134 	return ret;
135 }
136 
137 /**
138  * adis_read_reg_32() - read 4 bytes from a 32-bit register
139  * @adis: The adis device
140  * @reg: The address of the lower of the two registers
141  * @val: The value read back from the device
142  */
adis_read_reg_32(struct adis * adis,unsigned int reg,uint32_t * val)143 static inline int adis_read_reg_32(struct adis *adis, unsigned int reg,
144 	uint32_t *val)
145 {
146 	unsigned int tmp;
147 	int ret;
148 
149 	ret = adis_read_reg(adis, reg, &tmp, 4);
150 	*val = tmp;
151 
152 	return ret;
153 }
154 
155 int adis_enable_irq(struct adis *adis, bool enable);
156 int adis_check_status(struct adis *adis);
157 
158 int adis_initial_startup(struct adis *adis);
159 
160 int adis_single_conversion(struct iio_dev *indio_dev,
161 	const struct iio_chan_spec *chan, unsigned int error_mask,
162 	int *val);
163 
164 #define ADIS_VOLTAGE_CHAN(addr, si, chan, name, info_all, bits) { \
165 	.type = IIO_VOLTAGE, \
166 	.indexed = 1, \
167 	.channel = (chan), \
168 	.extend_name = name, \
169 	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
170 		BIT(IIO_CHAN_INFO_SCALE), \
171 	.info_mask_shared_by_all = info_all, \
172 	.address = (addr), \
173 	.scan_index = (si), \
174 	.scan_type = { \
175 		.sign = 'u', \
176 		.realbits = (bits), \
177 		.storagebits = 16, \
178 		.endianness = IIO_BE, \
179 	}, \
180 }
181 
182 #define ADIS_SUPPLY_CHAN(addr, si, info_all, bits) \
183 	ADIS_VOLTAGE_CHAN(addr, si, 0, "supply", info_all, bits)
184 
185 #define ADIS_AUX_ADC_CHAN(addr, si, info_all, bits) \
186 	ADIS_VOLTAGE_CHAN(addr, si, 1, NULL, info_all, bits)
187 
188 #define ADIS_TEMP_CHAN(addr, si, info_all, bits) { \
189 	.type = IIO_TEMP, \
190 	.indexed = 1, \
191 	.channel = 0, \
192 	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
193 		BIT(IIO_CHAN_INFO_SCALE) | \
194 		BIT(IIO_CHAN_INFO_OFFSET), \
195 	.info_mask_shared_by_all = info_all, \
196 	.address = (addr), \
197 	.scan_index = (si), \
198 	.scan_type = { \
199 		.sign = 'u', \
200 		.realbits = (bits), \
201 		.storagebits = 16, \
202 		.endianness = IIO_BE, \
203 	}, \
204 }
205 
206 #define ADIS_MOD_CHAN(_type, mod, addr, si, info_sep, info_all, bits) { \
207 	.type = (_type), \
208 	.modified = 1, \
209 	.channel2 = IIO_MOD_ ## mod, \
210 	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
211 		 info_sep, \
212 	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
213 	.info_mask_shared_by_all = info_all, \
214 	.address = (addr), \
215 	.scan_index = (si), \
216 	.scan_type = { \
217 		.sign = 's', \
218 		.realbits = (bits), \
219 		.storagebits = 16, \
220 		.endianness = IIO_BE, \
221 	}, \
222 }
223 
224 #define ADIS_ACCEL_CHAN(mod, addr, si, info_sep, info_all, bits) \
225 	ADIS_MOD_CHAN(IIO_ACCEL, mod, addr, si, info_sep, info_all, bits)
226 
227 #define ADIS_GYRO_CHAN(mod, addr, si, info_sep, info_all, bits)		\
228 	ADIS_MOD_CHAN(IIO_ANGL_VEL, mod, addr, si, info_sep, info_all, bits)
229 
230 #define ADIS_INCLI_CHAN(mod, addr, si, info_sep, info_all, bits) \
231 	ADIS_MOD_CHAN(IIO_INCLI, mod, addr, si, info_sep, info_all, bits)
232 
233 #define ADIS_ROT_CHAN(mod, addr, si, info_sep, info_all, bits) \
234 	ADIS_MOD_CHAN(IIO_ROT, mod, addr, si, info_sep, info_all, bits)
235 
236 #ifdef CONFIG_IIO_ADIS_LIB_BUFFER
237 
238 /**
239  * struct adis_burst - ADIS data for burst transfers
240  * @en			burst mode enabled
241  * @reg_cmd		register command that triggers burst
242  * @extra_len		extra length to account in the SPI RX buffer
243  */
244 struct adis_burst {
245 	bool		en;
246 	unsigned int	reg_cmd;
247 	unsigned int	extra_len;
248 };
249 
250 int adis_setup_buffer_and_trigger(struct adis *adis,
251 	struct iio_dev *indio_dev, irqreturn_t (*trigger_handler)(int, void *));
252 void adis_cleanup_buffer_and_trigger(struct adis *adis,
253 	struct iio_dev *indio_dev);
254 
255 int adis_probe_trigger(struct adis *adis, struct iio_dev *indio_dev);
256 void adis_remove_trigger(struct adis *adis);
257 
258 int adis_update_scan_mode(struct iio_dev *indio_dev,
259 	const unsigned long *scan_mask);
260 
261 #else /* CONFIG_IIO_BUFFER */
262 
adis_setup_buffer_and_trigger(struct adis * adis,struct iio_dev * indio_dev,irqreturn_t (* trigger_handler)(int,void *))263 static inline int adis_setup_buffer_and_trigger(struct adis *adis,
264 	struct iio_dev *indio_dev, irqreturn_t (*trigger_handler)(int, void *))
265 {
266 	return 0;
267 }
268 
adis_cleanup_buffer_and_trigger(struct adis * adis,struct iio_dev * indio_dev)269 static inline void adis_cleanup_buffer_and_trigger(struct adis *adis,
270 	struct iio_dev *indio_dev)
271 {
272 }
273 
adis_probe_trigger(struct adis * adis,struct iio_dev * indio_dev)274 static inline int adis_probe_trigger(struct adis *adis,
275 	struct iio_dev *indio_dev)
276 {
277 	return 0;
278 }
279 
adis_remove_trigger(struct adis * adis)280 static inline void adis_remove_trigger(struct adis *adis)
281 {
282 }
283 
284 #define adis_update_scan_mode NULL
285 
286 #endif /* CONFIG_IIO_BUFFER */
287 
288 #ifdef CONFIG_DEBUG_FS
289 
290 int adis_debugfs_reg_access(struct iio_dev *indio_dev,
291 	unsigned int reg, unsigned int writeval, unsigned int *readval);
292 
293 #else
294 
295 #define adis_debugfs_reg_access NULL
296 
297 #endif
298 
299 #endif
300