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/arch/powerpc/perf/
Dpower7-events-list.h8 EVENT(PM_IC_DEMAND_L2_BR_ALL, 0x04898)
9 EVENT(PM_GCT_UTIL_7_TO_10_SLOTS, 0x020a0)
10 EVENT(PM_PMC2_SAVED, 0x10022)
11 EVENT(PM_CMPLU_STALL_DFU, 0x2003c)
12 EVENT(PM_VSU0_16FLOP, 0x0a0a4)
13 EVENT(PM_MRK_LSU_DERAT_MISS, 0x3d05a)
14 EVENT(PM_MRK_ST_CMPL, 0x10034)
15 EVENT(PM_NEST_PAIR3_ADD, 0x40881)
16 EVENT(PM_L2_ST_DISP, 0x46180)
17 EVENT(PM_L2_CASTOUT_MOD, 0x16180)
[all …]
Dpower9-events-list.h11 EVENT(PM_CYC, 0x0001e)
12 EVENT(PM_ICT_NOSLOT_CYC, 0x100f8)
13 EVENT(PM_CMPLU_STALL, 0x1e054)
14 EVENT(PM_INST_CMPL, 0x00002)
15 EVENT(PM_BR_CMPL, 0x4d05e)
16 EVENT(PM_BR_MPRED_CMPL, 0x400f6)
19 EVENT(PM_LD_REF_L1, 0x100fc)
21 EVENT(PM_LD_MISS_L1_FIN, 0x2c04e)
22 EVENT(PM_LD_MISS_L1, 0x3e054)
24 EVENT(PM_LD_MISS_L1_ALT, 0x400f0)
[all …]
Dpower8-events-list.h11 EVENT(PM_CYC, 0x0001e)
12 EVENT(PM_GCT_NOSLOT_CYC, 0x100f8)
13 EVENT(PM_CMPLU_STALL, 0x4000a)
14 EVENT(PM_INST_CMPL, 0x00002)
15 EVENT(PM_BRU_FIN, 0x10068)
16 EVENT(PM_BR_MPRED_CMPL, 0x400f6)
19 EVENT(PM_LD_REF_L1, 0x100ee)
21 EVENT(PM_LD_MISS_L1, 0x3e054)
23 EVENT(PM_ST_MISS_L1, 0x300f0)
25 EVENT(PM_L1_PREF, 0x0d8b8)
[all …]
Dgeneric-compat-pmu.c41 #define EVENT(_name, _code) _name = _code, macro
44 EVENT(PM_CYC, 0x0001e) enumerator
45 EVENT(PM_INST_CMPL, 0x00002)
48 #undef EVENT
Dpower7-pmu.c52 #define EVENT(_name, _code) \ macro
58 #undef EVENT
383 #define EVENT(_name, _code) POWER_EVENT_ATTR(_name, _name); macro
385 #undef EVENT
387 #define EVENT(_name, _code) POWER_EVENT_PTR(_name), macro
400 #undef EVENT
Dpower8-pmu.c16 #define EVENT(_name, _code) _name = _code, macro
22 #undef EVENT
Dpower9-pmu.c79 #define EVENT(_name, _code) _name = _code, macro
85 #undef EVENT
/arch/arm/boot/dts/
Dqcom-ipq4019-ap.dk01.1-c1.dts9 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
Darm-realview-eb-11mp-bbrevd.dts16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
Darm-realview-eb-bbrevd.dts16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
Darm-realview-eb-a9mp-bbrevd.dts16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
Darm-realview-eb-11mp-bbrevd-ctrevb.dts16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
Dbcm94709.dts23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
Dqcom-ipq4019-ap.dk01.1.dtsi9 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
Darm-realview-eb-bbrevd.dtsi16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
Dbcm94708.dts23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
Dbcm9hmidc.dtsi23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
Darm-realview-eb-a9mp.dts16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
Dbcm911360k.dts23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
/arch/m68k/fpsp040/
DREADME18 IN NO EVENT SHALL MOTOROLA BE LIABLE FOR ANY DAMAGES WHATSOEVER
/arch/arm64/boot/dts/al/
Dalpine-v2-evp.dts28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
/arch/arm64/boot/dts/broadcom/stingray/
Dbcm958742t.dts23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
/arch/powerpc/boot/dts/fsl/
Dp1022ds.dtsi26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
131 * IRQ8 is generated if the "EVENT" switch is pressed
Dpq3-etsec2-grp2-1.dtsi26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
Dpq3-etsec2-grp2-2.dtsi26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY

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