/arch/powerpc/perf/ |
D | power7-events-list.h | 8 EVENT(PM_IC_DEMAND_L2_BR_ALL, 0x04898) 9 EVENT(PM_GCT_UTIL_7_TO_10_SLOTS, 0x020a0) 10 EVENT(PM_PMC2_SAVED, 0x10022) 11 EVENT(PM_CMPLU_STALL_DFU, 0x2003c) 12 EVENT(PM_VSU0_16FLOP, 0x0a0a4) 13 EVENT(PM_MRK_LSU_DERAT_MISS, 0x3d05a) 14 EVENT(PM_MRK_ST_CMPL, 0x10034) 15 EVENT(PM_NEST_PAIR3_ADD, 0x40881) 16 EVENT(PM_L2_ST_DISP, 0x46180) 17 EVENT(PM_L2_CASTOUT_MOD, 0x16180) [all …]
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D | power9-events-list.h | 11 EVENT(PM_CYC, 0x0001e) 12 EVENT(PM_ICT_NOSLOT_CYC, 0x100f8) 13 EVENT(PM_CMPLU_STALL, 0x1e054) 14 EVENT(PM_INST_CMPL, 0x00002) 15 EVENT(PM_BR_CMPL, 0x4d05e) 16 EVENT(PM_BR_MPRED_CMPL, 0x400f6) 19 EVENT(PM_LD_REF_L1, 0x100fc) 21 EVENT(PM_LD_MISS_L1_FIN, 0x2c04e) 22 EVENT(PM_LD_MISS_L1, 0x3e054) 24 EVENT(PM_LD_MISS_L1_ALT, 0x400f0) [all …]
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D | power8-events-list.h | 11 EVENT(PM_CYC, 0x0001e) 12 EVENT(PM_GCT_NOSLOT_CYC, 0x100f8) 13 EVENT(PM_CMPLU_STALL, 0x4000a) 14 EVENT(PM_INST_CMPL, 0x00002) 15 EVENT(PM_BRU_FIN, 0x10068) 16 EVENT(PM_BR_MPRED_CMPL, 0x400f6) 19 EVENT(PM_LD_REF_L1, 0x100ee) 21 EVENT(PM_LD_MISS_L1, 0x3e054) 23 EVENT(PM_ST_MISS_L1, 0x300f0) 25 EVENT(PM_L1_PREF, 0x0d8b8) [all …]
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D | generic-compat-pmu.c | 41 #define EVENT(_name, _code) _name = _code, macro 44 EVENT(PM_CYC, 0x0001e) enumerator 45 EVENT(PM_INST_CMPL, 0x00002) 48 #undef EVENT
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D | power7-pmu.c | 52 #define EVENT(_name, _code) \ macro 58 #undef EVENT 383 #define EVENT(_name, _code) POWER_EVENT_ATTR(_name, _name); macro 385 #undef EVENT 387 #define EVENT(_name, _code) POWER_EVENT_PTR(_name), macro 400 #undef EVENT
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D | power8-pmu.c | 16 #define EVENT(_name, _code) _name = _code, macro 22 #undef EVENT
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D | power9-pmu.c | 79 #define EVENT(_name, _code) _name = _code, macro 85 #undef EVENT
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/arch/arm/boot/dts/ |
D | qcom-ipq4019-ap.dk01.1-c1.dts | 9 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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D | arm-realview-eb-11mp-bbrevd.dts | 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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D | arm-realview-eb-bbrevd.dts | 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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D | arm-realview-eb-a9mp-bbrevd.dts | 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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D | arm-realview-eb-11mp-bbrevd-ctrevb.dts | 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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D | bcm94709.dts | 23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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D | qcom-ipq4019-ap.dk01.1.dtsi | 9 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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D | arm-realview-eb-bbrevd.dtsi | 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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D | bcm94708.dts | 23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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D | bcm9hmidc.dtsi | 23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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D | arm-realview-eb-a9mp.dts | 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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D | bcm911360k.dts | 23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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/arch/m68k/fpsp040/ |
D | README | 18 IN NO EVENT SHALL MOTOROLA BE LIABLE FOR ANY DAMAGES WHATSOEVER
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/arch/arm64/boot/dts/al/ |
D | alpine-v2-evp.dts | 28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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/arch/arm64/boot/dts/broadcom/stingray/ |
D | bcm958742t.dts | 23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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/arch/powerpc/boot/dts/fsl/ |
D | p1022ds.dtsi | 26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY 131 * IRQ8 is generated if the "EVENT" switch is pressed
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D | pq3-etsec2-grp2-1.dtsi | 26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
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D | pq3-etsec2-grp2-2.dtsi | 26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
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