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Searched refs:HSSPI_PLL_HZ_6362 (Results 1 – 1 of 1) sorted by relevance

/arch/mips/bcm63xx/
Dclk.c530 #define HSSPI_PLL_HZ_6362 400000000 macro
555 clk_hsspi_pll.rate = HSSPI_PLL_HZ_6362; in bcm63xx_clk_init()