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Searched refs:Hit_Writeback_Inv (Results 1 – 1 of 1) sorted by relevance

/arch/mips/include/asm/
Dcacheops.h31 #define Hit_Writeback_Inv 0x14 /* not with Cache_I though */ macro
45 #define Hit_Writeback_Inv_D (Cache_D | Hit_Writeback_Inv)
70 #define Hit_Writeback_Inv_SD (Cache_SD | Hit_Writeback_Inv)
98 #define Hit_Writeback_Inv_S (Cache_S | Hit_Writeback_Inv)