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Searched refs:ICH_LRC5 (Results 1 – 1 of 1) sorted by relevance

/arch/arm/include/asm/
Darch_gicv3.h79 #define ICH_LRC5 __LRC0(5) macro
167 CPUIF_MAP_LO_HI(ICH_LR5, ICH_LRC5, ICH_LR5_EL2) in CPUIF_MAP()