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Searched refs:IE_SW1 (Results 1 – 3 of 3) sorted by relevance

/arch/mips/include/asm/sn/sn0/
Dip27.h52 #define SRB_NET IE_SW1 /* 0x0200 */
/arch/mips/kernel/
Dsmp-bmips.c267 set_c0_status(IE_SW0 | IE_SW1 | bmips_tp1_irqs | IE_IRQ5 | ST0_IE); in bmips_smp_finish()
399 IE_IRQ5 | bmips_tp1_irqs | IE_SW0 | IE_SW1 | ST0_IE | ST0_BEV, in play_dead()
400 IE_SW0 | IE_SW1 | ST0_IE | ST0_BEV); in play_dead()
/arch/mips/include/asm/
Dmipsregs.h272 #define IE_SW1 (_ULCAST_(1) << 9) macro