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Searched refs:IOASIC_MCR (Results 1 – 2 of 2) sorted by relevance

/arch/mips/include/asm/dec/
Dioasic_addrs.h39 #define IOASIC_MCR (11*IOASIC_SLOT_SIZE) /* memory control (3max+) */ macro
/arch/mips/dec/
Decc-berr.c245 volatile u32 *mcr = (void *)CKSEG1ADDR(KN03_SLOT_BASE + IOASIC_MCR); in dec_kn03_be_init()