Searched refs:LEVEL (Results 1 – 5 of 5) sorted by relevance
| /arch/sh/boards/mach-dreamcast/ |
| D | irq.c | 52 #define LEVEL(event) (((event) - HW_EVENT_IRQ_BASE) / 32) macro
66 __u32 emr = EMR_BASE + (LEVEL(irq) << 4) + (LEVEL(irq) << 2); in disable_systemasic_irq()
78 __u32 emr = EMR_BASE + (LEVEL(irq) << 4) + (LEVEL(irq) << 2); in enable_systemasic_irq()
90 __u32 esr = ESR_BASE + (LEVEL(irq) << 2); in mask_ack_systemasic_irq()
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| /arch/x86/events/intel/ |
| D | ds.c | 56 #define LEVEL(x) P(LVLNUM, x) macro
62 P(OP, LOAD) | P(LVL, MISS) | LEVEL(L3) | P(SNOOP, NA),/* 0x00:ukn L3 */
63 OP_LH | P(LVL, L1) | LEVEL(L1) | P(SNOOP, NONE), /* 0x01: L1 local */
64 OP_LH | P(LVL, LFB) | LEVEL(LFB) | P(SNOOP, NONE), /* 0x02: LFB hit */
65 OP_LH | P(LVL, L2) | LEVEL(L2) | P(SNOOP, NONE), /* 0x03: L2 hit */
66 OP_LH | P(LVL, L3) | LEVEL(L3) | P(SNOOP, NONE), /* 0x04: L3 hit */
67 OP_LH | P(LVL, L3) | LEVEL(L3) | P(SNOOP, MISS), /* 0x05: L3 hit, snoop miss */
68 OP_LH | P(LVL, L3) | LEVEL(L3) | P(SNOOP, HIT), /* 0x06: L3 hit, snoop hit */
69 OP_LH | P(LVL, L3) | LEVEL(L3) | P(SNOOP, HITM), /* 0x07: L3 hit, snoop hitm */
70 OP_LH | P(LVL, REM_CCE1) | REM | LEVEL(L3) | P(SNOOP, HIT), /* 0x08: L3 miss snoop hit */
[all …]
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| /arch/parisc/kernel/ |
| D | signal32.c | 28 #define DBG(LEVEL, ...) \ argument
29 ((DEBUG_COMPAT_SIG_LEVEL >= LEVEL) \
32 #define DBG(LEVEL, ...) argument
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| D | signal.c | 45 #define DBG(LEVEL, ...) \ argument
46 ((DEBUG_SIG_LEVEL >= LEVEL) \
49 #define DBG(LEVEL, ...) argument
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| /arch/arm64/boot/dts/qcom/ |
| D | sdm845-cheza.dtsi | 116 /* BOARD-SPECIFIC TOP LEVEL NODES */
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