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Searched refs:MIPS_CONF5_FRE (Results 1 – 5 of 5) sorted by relevance

/arch/mips/include/asm/
Dfpu.h70 set_c0_config5(MIPS_CONF5_FRE); in __enable_fpu()
83 clear_c0_config5(MIPS_CONF5_FRE); in __enable_fpu()
Dmipsregs.h667 #define MIPS_CONF5_FRE (_ULCAST_(1) << 8) macro
/arch/mips/kvm/
Dvz.c123 mask |= MIPS_CONF5_FRE | MIPS_CONF5_UFE; in kvm_vz_config5_guest_wrmask()
1310 if (change & MIPS_CONF5_FRE && in kvm_trap_vz_handle_gsfc()
1312 change_c0_config5(MIPS_CONF5_FRE, val); in kvm_trap_vz_handle_gsfc()
3060 MIPS_CONF5_FRE | in kvm_vz_vcpu_setup()
Dmips.c1526 change_c0_config5(MIPS_CONF5_FRE, cfg5); in kvm_own_fpu()
1570 change_c0_config5(MIPS_CONF5_FRE, cfg5); in kvm_own_msa()
Demulate.c1256 mask |= MIPS_CONF5_FRE; in kvm_mips_config5_wrmask()
1477 if (change & MIPS_CONF5_FRE && in kvm_mips_emulate_CP0()
1479 change_c0_config5(MIPS_CONF5_FRE, val); in kvm_mips_emulate_CP0()