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Searched refs:MMCR1_PMC3SEL_SH (Results 1 – 4 of 4) sorted by relevance

/arch/powerpc/perf/
Dppc970-pmu.c64 #define MMCR1_PMC3SEL_SH 27 macro
387 << (MMCR1_PMC3SEL_SH - 5 * (pmc - 2)); in p970_compute_mmcr()
410 shift = MMCR1_PMC3SEL_SH - 5 * (pmc - 2); in p970_disable_pmc()
Dpower7-pmu.c44 #define MMCR1_PMC3SEL_SH 8 macro
Dpower5-pmu.c66 #define MMCR1_PMC3SEL_SH 9 macro
Dpower5+-pmu.c66 #define MMCR1_PMC3SEL_SH 9 macro