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Searched refs:MMCR1_TTM3SEL_SH (Results 1 – 4 of 4) sorted by relevance

/arch/powerpc/perf/
Dppc970-pmu.c50 #define MMCR1_TTM3SEL_SH 53 macro
337 mmcr1 |= 1ull << (MMCR1_TTM3SEL_SH + 3 - byte); in p970_compute_mmcr()
Dpower5-pmu.c46 #define MMCR1_TTM3SEL_SH 56 macro
479 mmcr1 |= 1ul << (MMCR1_TTM3SEL_SH + 3 - byte); in power5_compute_mmcr()
Dpower5+-pmu.c46 #define MMCR1_TTM3SEL_SH 56 macro
539 mmcr1 |= 1ul << (MMCR1_TTM3SEL_SH + 3 - byte); in power5p_compute_mmcr()
Dpower7-pmu.c34 #define MMCR1_TTM3SEL_SH 48 macro