Searched refs:MSR_IA32_MISC_ENABLE (Results 1 – 10 of 10) sorted by relevance
| /arch/x86/kernel/acpi/ |
| D | sleep.c | 85 if (!rdmsr_safe(MSR_IA32_MISC_ENABLE, in x86_acpi_suspend_lowlevel()
88 !wrmsr_safe(MSR_IA32_MISC_ENABLE, in x86_acpi_suspend_lowlevel()
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| /arch/x86/kernel/cpu/mce/ |
| D | therm_throt.c | 442 rdmsr(MSR_IA32_MISC_ENABLE, l, h); in intel_init_thermal()
512 rdmsr(MSR_IA32_MISC_ENABLE, l, h); in intel_init_thermal()
513 wrmsr(MSR_IA32_MISC_ENABLE, l | MSR_IA32_MISC_ENABLE_TM1, h); in intel_init_thermal()
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| /arch/x86/kernel/cpu/ |
| D | intel.c | 196 if (msr_clear_bit(MSR_IA32_MISC_ENABLE, in early_init_intel()
297 rdmsrl(MSR_IA32_MISC_ENABLE, misc_enable); in early_init_intel()
436 if (msr_set_bit(MSR_IA32_MISC_ENABLE, in intel_workarounds()
694 rdmsr(MSR_IA32_MISC_ENABLE, l1, l2); in init_intel()
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| /arch/x86/power/ |
| D | cpu.c | 126 ctxt->misc_enable_saved = !rdmsrl_safe(MSR_IA32_MISC_ENABLE, in __save_processor_state()
197 wrmsrl(MSR_IA32_MISC_ENABLE, ctxt->misc_enable); in __restore_processor_state()
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| /arch/x86/realmode/rm/ |
| D | wakeup_asm.S | 103 movl $MSR_IA32_MISC_ENABLE, %ecx
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| /arch/x86/kernel/ |
| D | verify_cpu.S | 93 movl $MSR_IA32_MISC_ENABLE, %ecx
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| /arch/x86/include/asm/ |
| D | msr-index.h | 608 #define MSR_IA32_MISC_ENABLE 0x000001a0 macro
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| /arch/x86/oprofile/ |
| D | op_model_p4.c | 578 rdmsr(MSR_IA32_MISC_ENABLE, low, high); in p4_setup_ctrs()
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| /arch/x86/events/intel/ |
| D | p4.c | 1348 rdmsr(MSR_IA32_MISC_ENABLE, low, high); in p4_pmu_init()
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| /arch/x86/kvm/ |
| D | x86.c | 1212 MSR_IA32_MISC_ENABLE,
2708 case MSR_IA32_MISC_ENABLE: in kvm_set_msr_common()
3009 case MSR_IA32_MISC_ENABLE: in kvm_get_msr_common()
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