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Searched refs:MSR_TS_S (Results 1 – 9 of 9) sorted by relevance

/arch/powerpc/kvm/
Dbook3s_hv_tm.c138 msr = (msr & ~MSR_TS_MASK) | MSR_TS_S; in kvmhv_p9_tm_emulation()
206 vcpu->arch.shregs.msr = msr | MSR_TS_S; in kvmhv_p9_tm_emulation()
Dbook3s_emulate.c190 guest_msr |= MSR_TS_S; in kvmppc_emulate_trchkpt()
283 srr1 |= MSR_TS_S; in kvmppc_core_emulate_op_pr()
Dbook3s_hv_builtin.c794 msr |= MSR_TS_S; in kvmppc_guest_entry_inject_int()
Dbook3s_64_mmu.c34 msr |= MSR_TS_S; in kvmppc_mmu_book3s_64_reset_msr()
Dbook3s_hv_nested.c312 vcpu->arch.shregs.msr |= MSR_TS_S; in kvmhv_enter_nested_guest()
Dbook3s_64_mmu_hv.c284 msr |= MSR_TS_S; in kvmppc_mmu_book3s_64_hv_reset_msr()
/arch/powerpc/include/asm/
Dreg.h121 #define MSR_TS_S __MASK(MSR_TS_S_LG) /* Transaction Suspended */ macro
123 #define MSR_TS_MASK (MSR_TS_T | MSR_TS_S) /* Transaction State bits */
126 #define MSR_TM_SUSPENDED(x) (((x) & MSR_TS_MASK) == MSR_TS_S)
/arch/powerpc/kernel/
Dtm.S142 li r7, (MSR_TS_S)@higher
Dprocess.c1346 {MSR_TS_S, "S"},
1360 if (val & (MSR_TM | MSR_TS_S | MSR_TS_T)) { in print_tm_bits()