Searched refs:MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 (Results 1 – 14 of 14) sorted by relevance
81 MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x400120b0
312 MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x130b0 /* WL_IRQ */
872 #define MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x2b4 0x69c 0x000 0x5 0x0 macro
564 MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1f0b0 /* SD3 WP */
1033 #define MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x324 0x70c 0x000 0x5 0x0 macro
542 MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x4001b0b1 /* TEN */
635 MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x4001b0b1 /* TEN */
559 MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x4001b0b1 /* TEN */
337 MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1b088 /* REVSTRAP1 */
407 MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1b0b0
485 MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1b0b0
660 MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x4001b0b1 /* TEN */
647 MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1f0b0 /* WP */
499 MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1b0b1 /* ETN PHY INT */