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Searched refs:PE (Results 1 – 12 of 12) sorted by relevance

/arch/arm/boot/compressed/
Defi-header.S15 @ PE/COFF expects the magic string "MZ" at offset 0, while the
30 @ The PE header can be anywhere in the file, but for
32 @ The offset to the PE/COFF header needs to be at offset
35 @ PE/COFF offset, and the "MZ" bytes at offset 0x0.
37 .long pe_header - start @ Offset to the PE header.
/arch/m68k/include/asm/
DMC68328.h538 #define PE(x) (1 << (x)) macro
540 #define PE_CSA1 PE(1) /* Use CSA1 as PE(1) */
541 #define PE_CSA2 PE(2) /* Use CSA2 as PE(2) */
542 #define PE_CSA3 PE(3) /* Use CSA3 as PE(3) */
543 #define PE_CSB0 PE(4) /* Use CSB0 as PE(4) */
544 #define PE_CSB1 PE(5) /* Use CSB1 as PE(5) */
545 #define PE_CSB2 PE(6) /* Use CSB2 as PE(6) */
546 #define PE_CSB3 PE(7) /* Use CSB3 as PE(7) */
DMC68EZ328.h449 #define PE(x) (1 << (x)) macro
DMC68VZ328.h458 #define PE(x) (1 << (x)) macro
/arch/x86/realmode/rm/
Dtrampoline_32.S53 movw $1, %dx # protected mode (PE) bit
Dtrampoline_64.S72 movl $X86_CR0_PE, %eax # protected mode (PE) bit
/arch/arm/boot/dts/
Dsun7i-a20-bananapi.dts224 /* PE */
/arch/arm64/boot/dts/allwinner/
Dsun50i-a64-bananapi-m64.dts233 * This regulator also drives the PE pingroup GPIOs,
/arch/x86/kernel/
Dhead_32.S341 andl $0x80000011,%eax # Save PG,PE,ET
/arch/x86/boot/
Dheader.S86 # Offset to the PE header.
/arch/x86/lib/
Dx86-opcode-map.txt416 4a: CMOVP/PE Gv,Ev | kaddw/q Vk,Hk,Uk | kaddb/d Vk,Hk,Uk (66)
503 9a: SETP/PE Eb
/arch/arm64/
DKconfig1029 comment "Support for PE file signature verification disabled"