| /arch/mips/boot/compressed/ |
| D | uart-16550.c | 13 #define PORT(offset) (CKSEG1ADDR(UART_BASE) + (offset)) macro
18 #define PORT(offset) (CKSEG1ADDR(AR7_REGS_UART0) + (4 * offset)) macro
23 #define PORT(offset) (CKSEG1ADDR(INGENIC_UART0_BASE_ADDR) + (4 * offset)) macro
28 #define PORT(offset) (CKSEG1ADDR(UART0_BASE) + (4 * offset)) macro
34 #define PORT(offset) (CKSEG1ADDR(UART0_BASE) + (4 * offset)) macro
42 #ifndef PORT
48 return *((volatile IOTYPE *)PORT(offset)) & 0xFF; in serial_in()
53 *((volatile IOTYPE *)PORT(offset)) = value & 0xFF; in serial_out()
|
| /arch/mips/kernel/ |
| D | 8250-platform.c | 11 #define PORT(base, int) \ macro
22 PORT(0x3F8, 4),
23 PORT(0x2F8, 3),
24 PORT(0x3E8, 4),
25 PORT(0x2E8, 3),
|
| /arch/mips/alchemy/common/ |
| D | platform.c | 51 #define PORT(_base, _irq) \ macro
65 PORT(AU1000_UART0_PHYS_ADDR, AU1000_UART0_INT),
66 PORT(AU1000_UART1_PHYS_ADDR, AU1000_UART1_INT),
67 PORT(AU1000_UART2_PHYS_ADDR, AU1000_UART2_INT),
68 PORT(AU1000_UART3_PHYS_ADDR, AU1000_UART3_INT),
71 PORT(AU1000_UART0_PHYS_ADDR, AU1500_UART0_INT),
72 PORT(AU1000_UART3_PHYS_ADDR, AU1500_UART3_INT),
75 PORT(AU1000_UART0_PHYS_ADDR, AU1100_UART0_INT),
76 PORT(AU1000_UART1_PHYS_ADDR, AU1100_UART1_INT),
77 PORT(AU1000_UART3_PHYS_ADDR, AU1100_UART3_INT),
[all …]
|
| /arch/mips/loongson64/common/ |
| D | early_printk.c | 13 #define PORT(base, offset) (u8 *)(base + offset) macro
17 return readb(PORT(base, offset)); in serial_in()
22 writeb(value, PORT(base, offset)); in serial_out()
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| D | serial.c | 22 #define PORT(int, clk) \ macro
43 [MACH_LEMOTE_FL2E] = {PORT(4, 1843200), {} },
44 [MACH_LEMOTE_FL2F] = {PORT(3, 1843200), {} },
49 [MACH_LEMOTE_LL2F] = {PORT(3, 1843200), {} },
|
| /arch/mips/sni/ |
| D | pcit.c | 22 #define PORT(_base,_irq) \ macro
32 PORT(0x3f8, 0),
33 PORT(0x2f8, 3),
46 PORT(0x3f8, 0),
47 PORT(0x2f8, 3),
48 PORT(0x3e8, 4),
49 PORT(0x2e8, 3),
|
| D | a20r.c | 20 #define PORT(_base,_irq) \ macro
30 PORT(0x3f8, 4),
31 PORT(0x2f8, 3),
|
| D | pcimt.c | 70 #define PORT(_base,_irq) \ macro
80 PORT(0x3f8, 4),
81 PORT(0x2f8, 3),
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| /arch/mips/ar7/ |
| D | prom.c | 240 #define PORT(offset) (KSEG1ADDR(AR7_REGS_UART0 + (offset * 4))) macro
243 return readl((void *)PORT(offset)); in serial_in()
248 writel(value, (void *)PORT(offset)); in serial_out()
|
| /arch/mips/netlogic/xlr/ |
| D | platform.c | 60 #define PORT(_irq) \ macro
74 PORT(PIC_UART_0_IRQ),
75 PORT(PIC_UART_1_IRQ),
|
| /arch/arm/boot/dts/ |
| D | omap3-cm-t3x.dtsi | 42 /* HS USB Host PHY on PORT 1 */
49 /* HS USB Host PHY on PORT 2 */
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| D | omap3-evm-common.dtsi | 27 /* HS USB Host PHY on PORT 2 */
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| D | omap4-duovero.dtsi | 40 /* HS USB Host PHY on PORT 1 */
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| D | omap4-var-som-om44.dtsi | 34 /* HS USB Host PHY on PORT 1 */
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| D | omap3-overo-base.dtsi | 46 /* HS USB Host PHY on PORT 2 */
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| D | omap3-igep0020-common.dtsi | 53 /* HS USB Host PHY on PORT 1 */
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| D | omap5-cm-t54.dts | 62 /* HS USB Host PHY on PORT 2 */
69 /* HS USB Host PHY on PORT 3 */
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| D | omap5-board-common.dtsi | 66 /* HS USB Host PHY on PORT 2 */
76 /* HS USB Host PHY on PORT 3 */
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| D | am3517-evm.dts | 161 /* HS USB Host PHY on PORT 1 */
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| D | omap3-beagle-xm.dts | 92 /* HS USB Host PHY on PORT 2 */
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| D | logicpd-som-lv.dtsi | 28 /* HS USB Host PHY on PORT 1 */
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| D | omap3-tao3530.dtsi | 41 /* HS USB Host PHY on PORT 2 */
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| D | omap3-beagle.dts | 59 /* HS USB Host PHY on PORT 2 */
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| D | omap4-panda-common.dtsi | 102 /* HS USB Host PHY on PORT 1 */
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| D | omap3-pandora-common.dtsi | 207 /* HS USB Host PHY on PORT 2 */
|