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Searched refs:PTRS_PER_PTE (Results 1 – 25 of 107) sorted by relevance

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/arch/xtensa/mm/
Dkasan_init.c26 for (i = 0; i < PTRS_PER_PTE; ++i) in kasan_early_init()
41 unsigned long n_pmds = n_pages / PTRS_PER_PTE; in populate()
57 for (k = 0; k < PTRS_PER_PTE; ++k, ++j) { in populate()
70 for (i = 0; i < n_pmds ; ++i, pte += PTRS_PER_PTE) in populate()
95 for (i = 0; i < PTRS_PER_PTE; ++i) in kasan_init()
Dmmu.c29 n_pages = ALIGN(n_pages, PTRS_PER_PTE); in init_pmd()
42 for (i = 0; i < n_pages; i += PTRS_PER_PTE, ++pmd) { in init_pmd()
/arch/m68k/include/asm/
Dpgtable_mm.h57 #define PTRS_PER_PTE 16 macro
62 #define PTRS_PER_PTE 512 macro
67 #define PTRS_PER_PTE 1024 macro
/arch/s390/mm/
Dpgalloc.c164 memset64(table, _PAGE_INVALID, PTRS_PER_PTE); in page_table_alloc_pgste()
165 memset64(table + PTRS_PER_PTE, 0, PTRS_PER_PTE); in page_table_alloc_pgste()
199 table += PTRS_PER_PTE; in page_table_alloc()
223 memset64((u64 *)table, _PAGE_INVALID, PTRS_PER_PTE); in page_table_alloc()
224 memset64((u64 *)table + PTRS_PER_PTE, 0, PTRS_PER_PTE); in page_table_alloc()
228 memset64((u64 *)table, _PAGE_INVALID, 2 * PTRS_PER_PTE); in page_table_alloc()
244 bit = (__pa(table) & ~PAGE_MASK)/(PTRS_PER_PTE*sizeof(pte_t)); in page_table_free()
278 bit = (__pa(table) & ~PAGE_MASK) / (PTRS_PER_PTE*sizeof(pte_t)); in page_table_free_rcu()
330 memset64(table, _PAGE_INVALID, PTRS_PER_PTE); in base_pgt_alloc()
Dpageattr.c72 mask = ~(PTRS_PER_PTE * sizeof(pte_t) - 1); in pgt_set()
127 for (i = 0; i < PTRS_PER_PTE; i++) { in split_pmd_page()
134 update_page_count(PG_DIRECT_MAP_4K, PTRS_PER_PTE); in split_pmd_page()
355 nr = PTRS_PER_PTE - (nr & (PTRS_PER_PTE - 1)); in __kernel_map_pages()
/arch/arm/include/asm/
Dpgtable-2level.h70 #define PTRS_PER_PTE 512 macro
74 #define PTE_HWTABLE_PTRS (PTRS_PER_PTE)
76 #define PTE_HWTABLE_SIZE (PTRS_PER_PTE * sizeof(u32))
Dhighmem.h8 #define LAST_PKMAP PTRS_PER_PTE
/arch/hexagon/include/asm/
Dpgtable.h78 #define PTRS_PER_PTE 1024 macro
82 #define PTRS_PER_PTE 256 macro
86 #define PTRS_PER_PTE 64 macro
90 #define PTRS_PER_PTE 16 macro
94 #define PTRS_PER_PTE 4 macro
432 #define __pte_offset(address) (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
Dmem-layout.h84 #define LAST_PKMAP PTRS_PER_PTE
/arch/m68k/mm/
Dsun3mmu.c72 next_pgtable += PTRS_PER_PTE * sizeof (pte_t); in paging_init()
78 for (i=0; i<PTRS_PER_PTE; ++i, ++pg_table) { in paging_init()
/arch/mips/include/asm/
Dpgtable-32.h91 # define PTRS_PER_PTE ((PAGE_SIZE << PTE_ORDER) / sizeof(pte_t) / 2) macro
93 # define PTRS_PER_PTE ((PAGE_SIZE << PTE_ORDER) / sizeof(pte_t)) macro
122 extern pte_t invalid_pte_table[PTRS_PER_PTE];
214 (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
Dpgtable-64.h138 #define PTRS_PER_PTE ((PAGE_SIZE << PTE_ORDER) / sizeof(pte_t)) macro
151 min(PTRS_PER_PGD * PTRS_PER_PUD * PTRS_PER_PMD * PTRS_PER_PTE * PAGE_SIZE, \
174 extern pte_t invalid_pte_table[PTRS_PER_PTE];
352 (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
/arch/arc/mm/
Dhighmem.c136 BUILD_BUG_ON(KM_TYPE_NR > PTRS_PER_PTE); in kmap_init()
139 BUILD_BUG_ON(LAST_PKMAP > PTRS_PER_PTE); in kmap_init()
/arch/arc/include/asm/
Dpgalloc.h87 return get_order(PTRS_PER_PTE * sizeof(pte_t)); in __get_order_pte()
109 memzero((void *)pte_pg, PTRS_PER_PTE * sizeof(pte_t)); in pte_alloc_one()
/arch/powerpc/mm/book3s64/
Dsubpage_prot.c118 i = (addr >> PAGE_SHIFT) & (PTRS_PER_PTE - 1); in subpage_prot_clear()
119 nw = PTRS_PER_PTE - i; in subpage_prot_clear()
265 i = (addr >> PAGE_SHIFT) & (PTRS_PER_PTE - 1); in SYSCALL_DEFINE3()
266 nw = PTRS_PER_PTE - i; in SYSCALL_DEFINE3()
Dhash_64k.c89 rpte = __real_pte(__pte(old_pte), ptep, PTRS_PER_PTE); in __hash_page_4K()
216 new_pte |= pte_set_hidx(ptep, rpte, subpg_index, slot, PTRS_PER_PTE); in __hash_page_4K()
264 rpte = __real_pte(__pte(old_pte), ptep, PTRS_PER_PTE); in __hash_page_64K()
329 new_pte |= pte_set_hidx(ptep, rpte, 0, slot, PTRS_PER_PTE); in __hash_page_64K()
Dhash_4k.c58 rpte = __real_pte(__pte(old_pte), ptep, PTRS_PER_PTE); in __hash_page_4K()
120 new_pte |= pte_set_hidx(ptep, rpte, 0, slot, PTRS_PER_PTE); in __hash_page_4K()
/arch/x86/include/asm/
Dpgtable-2level_types.h36 #define PTRS_PER_PTE 1024 macro
Dpgtable-3level_types.h46 #define PTRS_PER_PTE 512 macro
/arch/csky/include/asm/
Dpgtable.h32 #define PTRS_PER_PTE ((PAGE_SIZE << PTE_ORDER) / sizeof(pte_t)) macro
41 (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
111 extern pte_t invalid_pte_table[PTRS_PER_PTE];
297 ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)); in pte_offset()
/arch/x86/power/
Dhibernate_32.c111 pfn += PTRS_PER_PTE; in resume_physical_mapping_init()
119 max_pte = pte + PTRS_PER_PTE; in resume_physical_mapping_init()
/arch/nds32/include/asm/
Dhighmem.h31 #define LAST_PKMAP PTRS_PER_PTE
/arch/nios2/include/asm/
Dpgtable.h78 #define PTRS_PER_PTE ((PAGE_SIZE << PTE_ORDER) / sizeof(pte_t)) macro
255 (((addr) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)))
263 (((addr) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)))
/arch/um/include/asm/
Dpgtable-2level.h24 #define PTRS_PER_PTE 1024 macro
/arch/arm64/include/asm/
Dpgtable-hwdef.h43 #define PTRS_PER_PTE (1 << (PAGE_SHIFT - 3)) macro
52 #define PTRS_PER_PMD PTRS_PER_PTE
62 #define PTRS_PER_PUD PTRS_PER_PTE

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