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Searched refs:REG_GIM_P_INT_DST_26 (Results 1 – 2 of 2) sorted by relevance

/arch/arc/plat-eznps/
Dplatform.c65 iowrite32be(gim_p_int_dst.value, REG_GIM_P_INT_DST_26); in eznps_configure_gim()
/arch/arc/plat-eznps/include/plat/
Dctop.h196 #define REG_GIM_P_INT_DST_26 nps_host_reg_non_cl(NPS_GIM_BLKID, 0x14A) macro