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Searched refs:REG_GIM_P_INT_POL_0 (Results 1 – 2 of 2) sorted by relevance

/arch/arc/plat-eznps/
Dplatform.c44 reg_value = ioread32be(REG_GIM_P_INT_POL_0); in eznps_configure_gim()
46 iowrite32be(reg_value, REG_GIM_P_INT_POL_0); in eznps_configure_gim()
/arch/arc/plat-eznps/include/plat/
Dctop.h190 #define REG_GIM_P_INT_POL_0 nps_host_reg_non_cl(NPS_GIM_BLKID, 0x110) macro