Searched refs:SPI (Results 1 – 25 of 70) sorted by relevance
123
139 label = "SPI U-Boot Image";146 label = "SPI DTB Image";152 label = "SPI Linux Kernel Image";158 label = "SPI Compressed RFS Image";164 label = "SPI JFFS2 RFS";
161 label = "SPI (RO) U-Boot Image";168 label = "SPI (RO) DTB Image";175 label = "SPI (RO) Linux Kernel Image";182 label = "SPI (RO) Compressed RFS Image";189 label = "SPI (RW) JFFS2 RFS";
121 label = "SPI Flash U-Boot Image";128 label = "SPI Flash DTB Image";134 label = "SPI Flash Linux Kernel Image";140 label = "SPI Flash Compressed RFSImage";146 label = "SPI Flash JFFS2 RFS";
161 label = "SPI U-Boot Image";168 label = "SPI DTB Image";174 label = "SPI Linux Kernel Image";180 label = "SPI Compressed RFS Image";186 label = "SPI JFFS2 RFS";
160 label = "SPI Flash U-Boot Image";167 label = "SPI Flash DTB Image";173 label = "SPI Flash Linux Kernel Image";179 label = "SPI Flash Compressed RFSImage";185 label = "SPI Flash JFFS2 RFS";
178 label = "SPI Flash U-Boot Image";185 label = "SPI Flash DTB Image";191 label = "SPI Flash Linux Kernel Image";197 label = "SPI Flash RFS Image";
166 label = "SPI U-Boot Image";173 label = "SPI DTB Image";179 label = "SPI Linux Kernel Image";185 label = "SPI File System Image";
179 "SPI NOR MOSI", "SPI NOR MISO", "SPI NOR Clk",180 "", "SPI NOR Chip Select",
247 "", "", "SPI-CE0", "SPI-CLK", "SPI-MOSI",248 "SPI-MISO", "SPI-CE1", "",
196 /* SPI-NOR is shared pin with serial NAND */204 /* Serial NAND is shared pin with SPI-NOR */
39 /* ADG704BRMZ 1:4 SPI mux/demux */49 /* SPI controller settings for SJA1105 timing requirements */
56 * On the first generation boards, this SSP/SPI port was connected
175 /* SPI = 0, IRQ# = 7, 4 = active high level-sensitive */187 /* SPI = 0, IRQ# = 119, 4 = active high level-sensitive */
70 /* Winbond 25Q128FVSG SPI flash */
94 /* Winbond 25Q128BVFG SPI flash */
110 /* Spansion S25FL032PIF SPI flash */
363 SPI, enumerator437 INTC_GROUP(SPI, HSPI, RSPI, QSPI),484 SPI, /* HSPI, RSPI, QSPI */506 { VIN0, SPI, _2DG, LBSCATA } },
353 TMU, DMAC, I2S, SRC, GFX3D, SPI, SCIF, BBDMAC, enumerator412 INTC_GROUP(SPI, SPI0, SPI1),422 { 0, BBDMAC, ADC, SCIF, SPI, EXBUS_ATA, GFX3D, GFX2D,433 { 0xffe00014, 0, 32, 8, /* INT2PRI5 */ { 0, GFX3D, EXBUS_ATA, SPI } },
306 * [13] CP1 SPI1 MISO (TDM and SPI ROM shared)307 * [14] CP1 SPI1 CS0n (64Mb SPI ROM)308 * [15] CP1 SPI1 MOSI (TDM and SPI ROM shared)309 * [16] CP1 SPI1 CLK (TDM and SPI ROM shared)
146 * SPI on CPM and NAND have common pins on this board. We can148 * disable the SPI), the "status = "okay";" line have to be
389 /* Serial NAND is shared pin with SPI-NOR */411 /* SPI-NOR is shared pin with serial NAND */419 /* serial NAND is shared pin with SPI-NOR */
426 /* Serial NAND is shared pin with SPI-NOR */448 /* SPI-NOR is shared pin with serial NAND */456 /* serial NAND is shared pin with SPI-NOR */
188 SPI controller 0194 SPI controller 1200 SPI controller 2
151 bool "I2C/SPI relocation patch"156 bool "I2C/SPI/SMC1 relocation patch"