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Searched refs:SPR_DMR1_CW0_AND (Results 1 – 1 of 1) sorted by relevance

/arch/openrisc/include/asm/
Dspr_defs.h417 #define SPR_DMR1_CW0_AND 0x00000001 macro
419 #define SPR_DMR1_CW0 (SPR_DMR1_CW0_AND | SPR_DMR1_CW0_OR)