| /arch/powerpc/boot/ |
| D | ns16550.c | 24 #define UART_LSR 5 /* In: Line Status Register */ macro
41 while ((in_8(reg_base + (UART_LSR << reg_shift)) & UART_LSR_THRE) == 0); in ns16550_putc()
47 while ((in_8(reg_base + (UART_LSR << reg_shift)) & UART_LSR_DR) == 0); in ns16550_getc()
53 return ((in_8(reg_base + (UART_LSR << reg_shift)) & UART_LSR_DR) != 0); in ns16550_tstc()
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| /arch/arm/include/debug/ |
| D | palmchip.S | 5 #undef UART_LSR
9 #define UART_LSR 7 macro
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| D | omap2plus.S | 47 mov \rp, #(UART_LSR << ZOOM_PORT_SHIFT)
72 1001: ldrb \rd, [\rx] @ rx contains UART_LSR address
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| D | 8250.S | 42 1002: load \rd, [\rx, #UART_LSR << UART_SHIFT]
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| D | brcmstb.S | 137 1002: load \rd, [\rx, #UART_LSR << UART_SHIFT]
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| D | tegra.S | 174 1001: ldrb \rd, [\rx, #UART_LSR << UART_SHIFT]
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| /arch/arm/mach-dove/include/mach/ |
| D | uncompress.h | 10 #define UART_LSR ((volatile unsigned char *)(UART0_PHYS_BASE + 0x14)) macro
20 if (*UART_LSR & LSR_THRE) in putc()
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| /arch/arm/mach-ebsa110/include/mach/ |
| D | uncompress.h | 20 v = base[UART_LSR << 2]; in putc()
32 v = base[UART_LSR << 2]; in flush()
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| /arch/mips/ath25/ |
| D | early_printk.c | 40 while ((prom_uart_rr(base, UART_LSR) & UART_LSR_THRE) == 0) in prom_putchar()
43 while ((prom_uart_rr(base, UART_LSR) & UART_LSR_THRE) == 0) in prom_putchar()
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| /arch/arm/mach-davinci/include/mach/ |
| D | uncompress.h | 38 while (!(uart[UART_LSR] & UART_LSR_THRE)) in putc()
48 while (!(uart[UART_LSR] & UART_LSR_THRE)) in flush()
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| /arch/powerpc/platforms/embedded6xx/ |
| D | ls_uart.c | 36 char lsr = in_8(avr_addr + UART_LSR); in wd_stop()
46 while (in_8(avr_addr + UART_LSR) & UART_LSR_DR) in wd_stop()
104 (void) in_8(avr_addr + UART_LSR); in ls_uart_init()
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| /arch/powerpc/kernel/ |
| D | udbg_16550.c | 22 #define UART_LSR 5 macro
51 while ((udbg_uart_in(UART_LSR) & LSR_THRE) == 0) in udbg_uart_flush()
71 if (!(udbg_uart_in(UART_LSR) & LSR_DR)) in udbg_uart_getc_poll()
82 while (!(udbg_uart_in(UART_LSR) & LSR_DR)) in udbg_uart_getc()
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| /arch/mips/ath79/ |
| D | early_printk.c | 38 prom_putchar_wait(base + UART_LSR * 4, BOTH_EMPTY, BOTH_EMPTY); in prom_putchar_ar71xx()
40 prom_putchar_wait(base + UART_LSR * 4, BOTH_EMPTY, BOTH_EMPTY); in prom_putchar_ar71xx()
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| /arch/arm/mach-iop32x/include/mach/ |
| D | uncompress.h | 16 while ((uart_base[UART_LSR] & TX_DONE) != TX_DONE) in putc()
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| /arch/mips/netlogic/common/ |
| D | earlycons.c | 60 while ((nlm_read_reg(uartbase, UART_LSR) & UART_LSR_THRE) == 0) in prom_putchar()
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| /arch/arm/mach-ixp4xx/include/mach/ |
| D | uncompress.h | 24 while ((uart_base[UART_LSR] & TX_DONE) != TX_DONE) in putc()
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| /arch/mips/loongson64/common/ |
| D | early_printk.c | 33 while (((serial_in(uart_base, UART_LSR) & UART_LSR_THRE) == 0) && in prom_putchar()
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| /arch/arm/mach-pxa/include/mach/ |
| D | uncompress.h | 41 while (!(uart_read(UART_LSR) & UART_LSR_THRE)) in putc()
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| /arch/mips/kernel/ |
| D | early_printk_8250.c | 46 status = serial_in(UART_LSR); in prom_putchar()
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| D | cps-vec-ns16550.S | 15 #define UART_LSR_OFS (UART_LSR << CONFIG_MIPS_CPS_NS16550_SHIFT)
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| /arch/mips/boot/compressed/ |
| D | uart-16550.c | 60 while (((serial_in(UART_LSR) & UART_LSR_THRE) == 0) && (timeout-- > 0)) in putc()
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| /arch/arm/mach-omap1/include/mach/ |
| D | uncompress.h | 57 while (!(uart_base[UART_LSR << uart_shift] & UART_LSR_THRE)) in putc()
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| /arch/sh/include/asm/ |
| D | smc37c93x.h | 64 #define UART_LSR 0xa /* Line Status Register */ macro
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| /arch/x86/platform/ce4100/ |
| D | ce4100.c | 64 lsr = mem_serial_in(p, UART_LSR); in ce4100_mem_serial_in()
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| /arch/mips/ar7/ |
| D | prom.c | 253 while ((serial_in(UART_LSR) & UART_LSR_TEMT) == 0) in prom_putchar()
|