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/arch/x86/events/
Dprobe.h16 #define __PMU_EVENT_GROUP(_name) \ argument
17 static struct attribute *attrs_##_name[] = { \
18 &attr_##_name.attr.attr, \
22 #define PMU_EVENT_GROUP(_grp, _name) \ argument
23 __PMU_EVENT_GROUP(_name); \
24 static struct attribute_group group_##_name = { \
26 .attrs = attrs_##_name, \
Dperf_event.h742 #define EVENT_ATTR(_name, _id) \ argument
744 .attr = __ATTR(_name, 0444, events_sysfs_show, NULL), \
749 #define EVENT_ATTR_STR(_name, v, str) \ argument
751 .attr = __ATTR(_name, 0444, events_sysfs_show, NULL), \
756 #define EVENT_ATTR_STR_HT(_name, v, noht, ht) \ argument
758 .attr = __ATTR(_name, 0444, events_ht_sysfs_show, NULL),\
/arch/arm/mach-mmp/
Ddevices.h20 #define PXA168_DEVICE(_name, _drv, _id, _irq, _start, _size, _dma...) \ argument
21 struct pxa_device_desc pxa168_device_##_name __initdata = { \
22 .dev_name = "pxa168-" #_name, \
31 #define PXA910_DEVICE(_name, _drv, _id, _irq, _start, _size, _dma...) \ argument
32 struct pxa_device_desc pxa910_device_##_name __initdata = { \
33 .dev_name = "pxa910-" #_name, \
42 #define MMP2_DEVICE(_name, _drv, _id, _irq, _start, _size, _dma...) \ argument
43 struct pxa_device_desc mmp2_device_##_name __initdata = { \
44 .dev_name = "mmp2-" #_name, \
Dclock.h25 #define APBC_CLK(_name, _reg, _fnclksel, _rate) \ argument
26 struct clk clk_##_name = { \
33 #define APBC_CLK_OPS(_name, _reg, _fnclksel, _rate, _ops) \ argument
34 struct clk clk_##_name = { \
41 #define APMU_CLK(_name, _reg, _eval, _rate) \ argument
42 struct clk clk_##_name = { \
49 #define APMU_CLK_OPS(_name, _reg, _eval, _rate, _ops) \ argument
50 struct clk clk_##_name = { \
/arch/x86/include/asm/
Dpercpu.h571 #define DEFINE_EARLY_PER_CPU(_type, _name, _initvalue) \ argument
572 DEFINE_PER_CPU(_type, _name) = _initvalue; \
573 __typeof__(_type) _name##_early_map[NR_CPUS] __initdata = \
575 __typeof__(_type) *_name##_early_ptr __refdata = _name##_early_map
577 #define DEFINE_EARLY_PER_CPU_READ_MOSTLY(_type, _name, _initvalue) \ argument
578 DEFINE_PER_CPU_READ_MOSTLY(_type, _name) = _initvalue; \
579 __typeof__(_type) _name##_early_map[NR_CPUS] __initdata = \
581 __typeof__(_type) *_name##_early_ptr __refdata = _name##_early_map
583 #define EXPORT_EARLY_PER_CPU_SYMBOL(_name) \ argument
584 EXPORT_PER_CPU_SYMBOL(_name)
[all …]
/arch/powerpc/include/asm/
Dperf_event_server.h152 #define EVENT_ATTR(_name, _id, _suffix) \ argument
153 PMU_EVENT_ATTR(_name, EVENT_VAR(_id, _suffix), _id, \
156 #define GENERIC_EVENT_ATTR(_name, _id) EVENT_ATTR(_name, _id, _g) argument
159 #define CACHE_EVENT_ATTR(_name, _id) EVENT_ATTR(_name, _id, _c) argument
162 #define POWER_EVENT_ATTR(_name, _id) EVENT_ATTR(_name, _id, _p) argument
/arch/mips/include/asm/mach-ralink/
Dpinmux.h12 #define GRP(_name, _func, _mask, _shift) \ argument
13 { .name = _name, .mask = _mask, .shift = _shift, \
17 #define GRP_G(_name, _func, _mask, _gpio, _shift) \ argument
18 { .name = _name, .mask = _mask, .shift = _shift, \
/arch/arm/include/asm/mach/
Darch.h81 #define MACHINE_START(_type,_name) \ argument
86 .name = _name,
91 #define DT_MACHINE_START(_name, _namestr) \ argument
92 static const struct machine_desc __mach_desc_##_name \
/arch/s390/include/asm/
Dperf_event.h29 #define EVENT_VAR(_cat, _name) event_attr_##_cat##_##_name argument
30 #define EVENT_PTR(_cat, _name) (&EVENT_VAR(_cat, _name).attr.attr) argument
/arch/arm/mach-imx/devices/
Dplatform-imx-ssi.c71 #define DMARES(_name) { \ in imx_add_imx_ssi() argument
72 .name = #_name, \ in imx_add_imx_ssi()
73 .start = data->dma ## _name, \ in imx_add_imx_ssi()
74 .end = data->dma ## _name, \ in imx_add_imx_ssi()
/arch/arc/include/asm/
Dmach_desc.h54 #define MACHINE_START(_type, _name) \ argument
57 .name = _name,
/arch/mips/include/asm/
Dmips_machine.h21 #define MIPS_MACHINE(_type, _id, _name, _setup) \ argument
23 __aligned(1) = _name; \
/arch/powerpc/perf/
Dpower7-pmu.c52 #define EVENT(_name, _code) \ argument
53 _name = _code,
383 #define EVENT(_name, _code) POWER_EVENT_ATTR(_name, _name); argument
387 #define EVENT(_name, _code) POWER_EVENT_PTR(_name), argument
Dhv-gpci.c76 #define HV_CAPS_ATTR(_name, _format) \ argument
77 static ssize_t _name##_show(struct device *dev, \
86 return sprintf(page, _format, caps._name); \
88 static struct device_attribute hv_caps_attr_##_name = __ATTR_RO(_name)
Dgeneric-compat-pmu.c41 #define EVENT(_name, _code) _name = _code, argument
/arch/x86/events/amd/
Duncore.c266 #define AMD_FORMAT_ATTR(_dev, _name, _format) \ argument
268 _dev##_show##_name(struct device *dev, \
275 static struct device_attribute format_attr_##_dev##_name = __ATTR_RO(_dev);
278 #define AMD_ATTRIBUTE(_name) \ argument
279 static struct attribute *amd_uncore_format_attr_##_name[] = { \
280 &format_attr_event_##_name.attr, \
284 static struct attribute_group amd_uncore_format_group_##_name = { \
286 .attrs = amd_uncore_format_attr_##_name, \
288 static const struct attribute_group *amd_uncore_attr_groups_##_name[] = { \
290 &amd_uncore_format_group_##_name, \
/arch/sparc/kernel/
Dcpu.c54 #define CPU(ver, _name) \ argument
55 { .psr_vers = ver, .name = _name }
57 #define CPU_PMU(ver, _name, _pmu_name) \ argument
58 { .psr_vers = ver, .name = _name, .pmu_name = _pmu_name }
60 #define FPU(ver, _name) \ argument
61 { .fp_vers = ver, .name = _name }
/arch/s390/kernel/
Dipl.c172 #define IPL_ATTR_SHOW_FN(_prefix, _name, _format, args...) \ argument
173 static ssize_t sys_##_prefix##_##_name##_show(struct kobject *kobj, \
180 #define IPL_ATTR_CCW_STORE_FN(_prefix, _name, _ipl_blk) \ argument
181 static ssize_t sys_##_prefix##_##_name##_store(struct kobject *kobj, \
198 #define DEFINE_IPL_CCW_ATTR_RW(_prefix, _name, _ipl_blk) \ argument
199 IPL_ATTR_SHOW_FN(_prefix, _name, "0.%x.%04x\n", \
201 IPL_ATTR_CCW_STORE_FN(_prefix, _name, _ipl_blk); \
202 static struct kobj_attribute sys_##_prefix##_##_name##_attr = \
203 __ATTR(_name, (S_IRUGO | S_IWUSR), \
204 sys_##_prefix##_##_name##_show, \
[all …]
/arch/powerpc/kernel/
Deeh_sysfs.c39 #define EEH_SHOW_ATTR(_name,_memb,_format) \ argument
40 static ssize_t eeh_show_##_name(struct device *dev, \
51 static DEVICE_ATTR(_name, 0444, eeh_show_##_name, NULL);
/arch/arm/mach-ep93xx/
Ddma.c29 #define DMA_CHANNEL(_name, _base, _irq) \ argument
30 { .name = (_name), .base = (_base), .irq = (_irq) }
/arch/powerpc/platforms/cell/
Dcbe_thermal.c50 #define DEVICE_PREFIX_ATTR(_prefix,_name,_mode) \ argument
51 struct device_attribute attr_ ## _prefix ## _ ## _name = { \
52 .attr = { .name = __stringify(_name), .mode = _mode }, \
53 .show = _prefix ## _show_ ## _name, \
54 .store = _prefix ## _store_ ## _name, \
/arch/arm/mm/
Dcache-l2x0-pmu.c327 #define L2X0_EVENT_ATTR(_name, _config, _pl310_only) \ argument
329 .attr = __ATTR(_name, S_IRUGO, l2x0_pmu_event_show, NULL), \
334 #define L220_PLUS_EVENT_ATTR(_name, _config) \ argument
335 L2X0_EVENT_ATTR(_name, _config, false)
337 #define PL310_EVENT_ATTR(_name, _config) \ argument
338 L2X0_EVENT_ATTR(_name, _config, true)
/arch/arm64/kernel/
Dcpuinfo.c224 #define CPUREGS_ATTR_RO(_name, _field) \ argument
225 static ssize_t _name##_show(struct kobject *kobj, \
235 static struct kobj_attribute cpuregs_attr_##_name = __ATTR_RO(_name)
/arch/ia64/kernel/
Dtopology.c244 #define define_one_ro(_name) \ argument
245 static struct cache_attr _name = \
246 __ATTR(_name, 0444, show_##_name, NULL)
/arch/x86/events/intel/
Duncore.h171 #define INTEL_UNCORE_EVENT_DESC(_name, _config) \ argument
173 .attr = __ATTR(_name, 0444, uncore_event_show, NULL), \
177 #define DEFINE_UNCORE_FORMAT_ATTR(_var, _name, _format) \ argument
186 __ATTR(_name, 0444, __uncore_##_var##_show, NULL)

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