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Searched refs:cache_op (Results 1 – 24 of 24) sorted by relevance

/arch/csky/mm/
Ddma-mapping.c17 static inline void cache_op(phys_addr_t paddr, size_t size, in cache_op() function
58 cache_op(page_to_phys(page), size, dma_wbinv_set_zero_range); in arch_dma_prep_coherent()
66 cache_op(paddr, size, dma_wb_range); in arch_sync_dma_for_device()
70 cache_op(paddr, size, dma_wbinv_range); in arch_sync_dma_for_device()
85 cache_op(paddr, size, dma_inv_range); in arch_sync_dma_for_cpu()
/arch/nds32/kernel/
Ddma.c13 static inline void cache_op(phys_addr_t paddr, size_t size, in cache_op() function
57 cache_op(paddr, size, cpu_dma_wb_range); in arch_sync_dma_for_device()
72 cache_op(paddr, size, cpu_dma_inval_range); in arch_sync_dma_for_cpu()
81 cache_op(page_to_phys(page), size, cpu_dma_wbinval_range); in arch_dma_prep_coherent()
Dperf_event_cpu.c46 unsigned int cache_type, cache_op, cache_result, ret; in nds32_pmu_map_cache_event() local
52 cache_op = (config >> 8) & 0xff; in nds32_pmu_map_cache_event()
53 if (cache_op >= PERF_COUNT_HW_CACHE_OP_MAX) in nds32_pmu_map_cache_event()
60 ret = (int)(*cache_map)[cache_type][cache_op][cache_result]; in nds32_pmu_map_cache_event()
/arch/mips/include/asm/
Dr4kcache.h42 #define cache_op(op,addr) \ macro
54 cache_op(Index_Invalidate_I, addr); in flush_icache_line_indexed()
59 cache_op(Index_Writeback_Inv_D, addr); in flush_dcache_line_indexed()
64 cache_op(Index_Writeback_Inv_SD, addr); in flush_scache_line_indexed()
71 cache_op(Hit_Invalidate_I_Loongson2, addr); in flush_icache_line()
75 cache_op(Hit_Invalidate_I, addr); in flush_icache_line()
82 cache_op(Hit_Writeback_Inv_D, addr); in flush_dcache_line()
87 cache_op(Hit_Invalidate_D, addr); in invalidate_dcache_line()
92 cache_op(Hit_Invalidate_SD, addr); in invalidate_scache_line()
97 cache_op(Hit_Writeback_Inv_SD, addr); in flush_scache_line()
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Dbmips.h98 cache_op(Index_Load_Tag_S, ZSCM_REG_BASE + offset); in bmips_read_zscm_reg()
119 cache_op(Index_Store_Tag_S, ZSCM_REG_BASE + offset); in bmips_write_zscm_reg()
/arch/mips/mm/
Dsc-rm7k.c99 cache_op(Page_Invalidate_T, start); in blast_rm7k_tcache()
117 cache_op(Index_Store_Tag_T, CKSEG0ADDR(i)); in __rm7k_tc_enable()
143 cache_op(Index_Store_Tag_SD, CKSEG0ADDR(i)); in __rm7k_sc_enable()
210 cache_op(Index_Store_Tag_T, begin); in __probe_tcache()
215 cache_op(Index_Load_Tag_T, addr); in __probe_tcache()
Dsc-r5k.c31 cache_op(R5K_Page_Invalidate_S, start); in blast_r5000_scache()
55 cache_op(R5K_Page_Invalidate_S, a); in r5k_dma_cache_inv_sc()
Dsc-mips.c41 cache_op(Hit_Writeback_Inv_SD, addr & almask); in mips_sc_inv()
42 cache_op(Hit_Writeback_Inv_SD, (addr + size - 1) & almask); in mips_sc_inv()
Dc-r4k.c1539 cache_op(Index_Store_Tag_I, begin); in probe_scache()
1540 cache_op(Index_Store_Tag_D, begin); in probe_scache()
1541 cache_op(Index_Store_Tag_SD, begin); in probe_scache()
1546 cache_op(Index_Load_Tag_SD, addr); in probe_scache()
Duasm-mips.c68 [insn_cache] = {M(cache_op, 0, 0, 0, 0, 0), RS | RT | SIMM},
/arch/mips/kernel/
Dspram.c54 cache_op(Index_Store_Tag_I, CKSEG0|offset); in ispram_store_tag()
70 cache_op(Index_Load_Tag_I, CKSEG0 | offset); in ispram_load_tag()
89 cache_op(Index_Store_Tag_D, CKSEG0 | offset); in dspram_store_tag()
103 cache_op(Index_Load_Tag_D, CKSEG0 | offset); in dspram_load_tag()
Dmips-mt.c208 cache_op(Index_Load_Tag_D, INDEX_8); in mips_mt_set_cpuoptions()
218 cache_op(Index_Store_Tag_D, INDEX_8); in mips_mt_set_cpuoptions()
223 cache_op(Index_Store_Tag_D, INDEX_0); in mips_mt_set_cpuoptions()
Dperf_event_mipsxx.c684 unsigned int cache_type, cache_op, cache_result; in mipspmu_map_cache_event() local
691 cache_op = (config >> 8) & 0xff; in mipspmu_map_cache_event()
692 if (cache_op >= PERF_COUNT_HW_CACHE_OP_MAX) in mipspmu_map_cache_event()
701 [cache_op] in mipspmu_map_cache_event()
/arch/mips/sgi-ip22/
Dip28-berr.c74 cache_op(Index_Load_Tag_S, addr); in save_cache_tags()
77 cache_op(Index_Load_Tag_S, addr | 1L); in save_cache_tags()
92 cache_op(Index_Load_Tag_D, addr); in save_cache_tags()
95 cache_op(Index_Load_Tag_D, addr | 1L); in save_cache_tags()
108 cache_op(Index_Load_Tag_I, addr); in save_cache_tags()
111 cache_op(Index_Load_Tag_I, addr | 1L); in save_cache_tags()
/arch/xtensa/kernel/
Dperf_event.c106 unsigned int cache_type, cache_op, cache_result; in xtensa_pmu_cache_event() local
110 cache_op = (config >> 8) & 0xff; in xtensa_pmu_cache_event()
114 cache_op >= C(OP_MAX) || in xtensa_pmu_cache_event()
118 ret = xtensa_cache_ctl[cache_type][cache_op][cache_result]; in xtensa_pmu_cache_event()
/arch/arc/kernel/
Dperf_event.c141 unsigned int cache_type, cache_op, cache_result; in arc_pmu_cache_event() local
145 cache_op = (config >> 8) & 0xff; in arc_pmu_cache_event()
149 if (cache_op >= PERF_COUNT_HW_CACHE_OP_MAX) in arc_pmu_cache_event()
154 ret = arc_pmu_cache_map[cache_type][cache_op][cache_result]; in arc_pmu_cache_event()
160 cache_type, cache_op, cache_result, ret, in arc_pmu_cache_event()
/arch/mips/txx9/generic/
Dsetup.c161 cache_op(Index_Writeback_Inv_D, addr | 0); in early_flush_dcache()
162 cache_op(Index_Writeback_Inv_D, addr | 1); in early_flush_dcache()
163 cache_op(Index_Writeback_Inv_D, addr | 2); in early_flush_dcache()
164 cache_op(Index_Writeback_Inv_D, addr | 3); in early_flush_dcache()
210 cache_op(Index_Writeback_Inv_D, addr | 0); in early_flush_dcache()
211 cache_op(Index_Writeback_Inv_D, addr | 1); in early_flush_dcache()
/arch/mips/pmcs-msp71xx/
Dmsp_setup.c58 cache_op(Fill, iptr); in msp7120_reset()
/arch/x86/events/
Dcore.c303 unsigned int cache_type, cache_op, cache_result; in set_ext_hw_attr() local
313 cache_op = (config >> 8) & 0xff; in set_ext_hw_attr()
314 if (cache_op >= PERF_COUNT_HW_CACHE_OP_MAX) in set_ext_hw_attr()
316 cache_op = array_index_nospec(cache_op, PERF_COUNT_HW_CACHE_OP_MAX); in set_ext_hw_attr()
323 val = hw_cache_event_ids[cache_type][cache_op][cache_result]; in set_ext_hw_attr()
332 attr->config1 = hw_cache_extra_regs[cache_type][cache_op][cache_result]; in set_ext_hw_attr()
/arch/csky/kernel/
Dperf_event.c952 unsigned int cache_type, cache_op, cache_result; in csky_pmu_cache_event() local
955 cache_op = (config >> 8) & 0xff; in csky_pmu_cache_event()
960 if (cache_op >= PERF_COUNT_HW_CACHE_OP_MAX) in csky_pmu_cache_event()
965 return csky_pmu_cache_map[cache_type][cache_op][cache_result]; in csky_pmu_cache_event()
/arch/sparc/kernel/
Dperf_event.c1198 unsigned int cache_type, cache_op, cache_result; in sparc_map_cache_event() local
1208 cache_op = (config >> 8) & 0xff; in sparc_map_cache_event()
1209 if (cache_op >= PERF_COUNT_HW_CACHE_OP_MAX) in sparc_map_cache_event()
1216 pmap = &((*sparc_pmu->cache_map)[cache_type][cache_op][cache_result]); in sparc_map_cache_event()
/arch/mips/include/uapi/asm/
Dinst.h34 sdl_op, sdr_op, swr_op, cache_op, enumerator
/arch/mips/kvm/
Dvz.c1156 case cache_op: in kvm_trap_vz_handle_gpsi()
Demulate.c1952 case cache_op: in kvm_mips_emulate_inst()