/arch/arm64/boot/dts/xilinx/ |
D | zynqmp-clk.dtsi | 76 clocks = <&clk100 &clk100>; 80 clocks = <&clk100 &clk100>; 84 clocks = <&clk600>, <&clk100>; 88 clocks = <&clk600>, <&clk100>; 92 clocks = <&clk600>, <&clk100>; 96 clocks = <&clk600>, <&clk100>; 100 clocks = <&clk600>, <&clk100>; 104 clocks = <&clk600>, <&clk100>; 108 clocks = <&clk600>, <&clk100>; 112 clocks = <&clk600>, <&clk100>; [all …]
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/arch/arm/boot/dts/ |
D | s3c2416.dtsi | 30 clocks: clock-controller@4c000000 { label 41 clocks = <&clocks PCLK_PWM>; 49 clocks = <&clocks PCLK_UART0>, <&clocks PCLK_UART0>, 50 <&clocks SCLK_UART>; 57 clocks = <&clocks PCLK_UART1>, <&clocks PCLK_UART1>, 58 <&clocks SCLK_UART>; 65 clocks = <&clocks PCLK_UART2>, <&clocks PCLK_UART2>, 66 <&clocks SCLK_UART>; 75 clocks = <&clocks PCLK_UART3>, <&clocks PCLK_UART3>, 76 <&clocks SCLK_UART>; [all …]
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D | s5pv210.dtsi | 61 external-clocks { 90 clocks = <&clocks CLK_NANDXL>, <&clocks DOUT_FLASH>; 102 clocks: clock-controller@e0100000 { label 106 clocks = <&xxti>, <&xusbxti>; 142 clocks = <&clocks CLK_PDMA0>; 154 clocks = <&clocks CLK_PDMA1>; 169 clocks = <&clocks SCLK_SPI0>, <&clocks CLK_SPI0>; 185 clocks = <&clocks SCLK_SPI1>, <&clocks CLK_SPI1>; 199 clocks = <&clocks CLK_KEYIF>; 209 clocks = <&clocks CLK_I2C0>; [all …]
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D | omap24xx-clocks.dtsi | 11 clocks = <&func_96m_ck>, <&mcbsp_clks>; 19 clocks = <&mcbsp1_gate_fck>, <&mcbsp1_mux_fck>; 25 clocks = <&func_96m_ck>, <&mcbsp_clks>; 33 clocks = <&mcbsp2_gate_fck>, <&mcbsp2_mux_fck>; 77 clocks = <&virt_19200000_ck>, <&virt_26m_ck>, <&virt_13m_ck>, <&virt_12m_ck>; 85 clocks = <&aplls_clkin_ck>; 93 clocks = <&aplls_clkin_ck>, <&aplls_clkin_x2_ck>; 102 clocks = <&osc_ck>; 124 clocks = <&sys_ck>, <&sys_ck>; 131 clocks = <&sys_ck>; [all …]
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D | s3c64xx.dtsi | 68 clocks = <&clocks HCLK_HSMMC0>, <&clocks HCLK_HSMMC0>, 69 <&clocks SCLK_MMC0>; 79 clocks = <&clocks HCLK_HSMMC1>, <&clocks HCLK_HSMMC1>, 80 <&clocks SCLK_MMC1>; 90 clocks = <&clocks HCLK_HSMMC2>, <&clocks HCLK_HSMMC2>, 91 <&clocks SCLK_MMC2>; 101 clocks = <&clocks PCLK_WDT>; 110 clocks = <&clocks PCLK_IIC0>; 123 clocks = <&clocks PCLK_UART0>, <&clocks PCLK_UART0>, 124 <&clocks SCLK_UART>; [all …]
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D | omap3xxx-clocks.dtsi | 17 …clocks = <&virt_12m_ck>, <&virt_13m_ck>, <&virt_19200000_ck>, <&virt_26000000_ck>, <&virt_38_4m_ck… 24 clocks = <&osc_sys_ck>; 34 clocks = <&osc_sys_ck>; 42 clocks = <&dpll3_ck>; 50 clocks = <&dpll3_m2_ck>; 58 clocks = <&dpll4_ck>; 66 clocks = <&dpll3_m2x2_ck>; 74 clocks = <&sys_ck>; 84 clocks = <&core_96m_fck>, <&mcbsp_clks>; 92 clocks = <&mcbsp5_gate_fck>, <&mcbsp5_mux_fck>; [all …]
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D | omap2430-clocks.dtsi | 12 clocks = <&func_96m_ck>, <&mcbsp_clks>; 19 clocks = <&mcbsp3_gate_fck>, <&mcbsp3_mux_fck>; 25 clocks = <&func_96m_ck>, <&mcbsp_clks>; 33 clocks = <&mcbsp4_gate_fck>, <&mcbsp4_mux_fck>; 39 clocks = <&func_96m_ck>, <&mcbsp_clks>; 47 clocks = <&mcbsp5_gate_fck>, <&mcbsp5_mux_fck>; 55 clocks = <&dsp_fck>; 63 clocks = <&dsp_fck>; 73 clocks = <&iva2_1_gate_ick>, <&iva2_1_div_ick>; 79 clocks = <&core_ck>; [all …]
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D | omap36xx-am35xx-omap3430es2plus-clocks.dtsi | 11 clocks = <&corex2_fck>; 19 clocks = <&corex2_fck>; 28 clocks = <&sys_ck>, <&sys_ck>; 37 clocks = <&dpll5_ck>; 46 clocks = <&core_ck>; 54 clocks = <&core_ck>; 62 clocks = <&core_ck>; 70 clocks = <&core_ck>; 78 clocks = <&dpll4_m2x2_ck>; 86 clocks = <&core_ck>; [all …]
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D | omap2420-clocks.dtsi | 12 clocks = <&core_ck>; 20 clocks = <&core_ck>, <&sys_ck>, <&func_96m_ck>, <&func_54m_ck>; 28 clocks = <&sys_clkout2_src_gate>, <&sys_clkout2_src_mux>; 34 clocks = <&sys_clkout2_src>; 44 clocks = <&dsp_fck>; 52 clocks = <&dsp_fck>; 62 clocks = <&dsp_gate_ick>, <&dsp_div_ick>; 68 clocks = <&core_ck>; 76 clocks = <&core_ck>; 85 clocks = <&iva1_gate_ifck>, <&iva1_div_ifck>; [all …]
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D | omap34xx-omap36xx-clocks.dtsi | 11 clocks = <&l4_ick>; 19 clocks = <&security_l4_ick2>; 27 clocks = <&security_l4_ick2>; 35 clocks = <&security_l4_ick2>; 43 clocks = <&security_l4_ick2>; 51 clocks = <&dpll4_m5x2_ck>; 60 clocks = <&l4_ick>; 68 clocks = <&core_96m_fck>; 76 clocks = <&l3_ick>; 84 clocks = <&security_l3_ick>; [all …]
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D | am43xx-clocks.dtsi | 11 clocks = <&sysboot_freq_sel_ck>, <&crystal_freq_sel_ck>; 19 clocks = <&virt_19200000_ck>, <&virt_24000000_ck>, <&virt_25000000_ck>, <&virt_26000000_ck>; 27 clocks = <&virt_19200000_ck>, <&virt_24000000_ck>, <&virt_25000000_ck>, <&virt_26000000_ck>; 35 clocks = <&sys_clkin_ck>; 43 clocks = <&sys_clkin_ck>; 51 clocks = <&sys_clkin_ck>; 59 clocks = <&sys_clkin_ck>; 67 clocks = <&sys_clkin_ck>; 75 clocks = <&sys_clkin_ck>; 83 clocks = <&sys_clkin_ck>; [all …]
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D | omap3430es1-clocks.dtsi | 11 clocks = <&l3_ick>; 19 clocks = <&l3_ick>; 28 clocks = <&gfx_l3_ck>; 36 clocks = <&gfx_l3_fck>; 44 clocks = <&gfx_l3_fck>; 52 clocks = <&sys_ck>; 60 clocks = <&core_48m_fck>; 68 clocks = <&corex2_fck>; 76 clocks = <&corex2_fck>; 85 clocks = <&ssi_ssr_gate_fck_3430es1>, <&ssi_ssr_div_fck_3430es1>; [all …]
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D | omap36xx-omap3430es2plus-clocks.dtsi | 11 clocks = <&corex2_fck>; 19 clocks = <&corex2_fck>; 28 clocks = <&ssi_ssr_gate_fck_3430es2>, <&ssi_ssr_div_fck_3430es2>; 34 clocks = <&ssi_ssr_fck>; 42 clocks = <&core_l3_ick>; 50 clocks = <&l4_ick>; 58 clocks = <&ssi_l4_ick>; 66 clocks = <&omap_96m_fck>; 74 clocks = <&sys_ck>; 82 clocks = <&omap_96m_fck>; [all …]
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D | omap54xx-clocks.dtsi | 17 clocks = <&pad_clks_src_ck>; 37 clocks = <&slimbus_src_clk>; 105 clocks = <&abe_dpll_clk_mux>, <&abe_dpll_bypass_clk_mux>; 112 clocks = <&dpll_abe_ck>; 118 clocks = <&dpll_abe_x2_ck>; 127 clocks = <&dpll_abe_m2x2_ck>; 135 clocks = <&dpll_abe_m2x2_ck>; 144 clocks = <&aess_fclk>; 153 clocks = <&dpll_abe_m2x2_ck>; 161 clocks = <&dpll_abe_x2_ck>; [all …]
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D | dra7xx-clocks.dtsi | 11 clocks = <&atl_clkctrl DRA7_ATL_ATL_CLKCTRL 26>; 17 clocks = <&atl_clkctrl DRA7_ATL_ATL_CLKCTRL 26>; 23 clocks = <&atl_clkctrl DRA7_ATL_ATL_CLKCTRL 26>; 29 clocks = <&atl_clkctrl DRA7_ATL_ATL_CLKCTRL 26>; 107 clocks = <&sys_clkin1>; 199 clocks = <&abe_dpll_clk_mux>, <&abe_dpll_bypass_clk_mux>; 206 clocks = <&dpll_abe_ck>; 212 clocks = <&dpll_abe_x2_ck>; 223 clocks = <&dpll_abe_m2x2_ck>; 232 clocks = <&dpll_abe_ck>; [all …]
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D | am33xx-clocks.dtsi | 11 clocks = <&virt_19200000_ck>, <&virt_24000000_ck>, <&virt_25000000_ck>, <&virt_26000000_ck>; 19 clocks = <&sys_clkin_ck>; 27 clocks = <&sys_clkin_ck>; 35 clocks = <&sys_clkin_ck>; 43 clocks = <&sys_clkin_ck>; 51 clocks = <&sys_clkin_ck>; 59 clocks = <&sys_clkin_ck>; 67 clocks = <&sys_clkin_ck>; 75 clocks = <&sys_clkin_ck>; 83 clocks = <&sys_clkin_ck>; [all …]
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D | ste-nomadik-stn8815.dtsi | 40 clocks = <&timclk>, <&pclk>; 49 clocks = <&timclk>, <&pclk>; 64 clocks = <&pclk>; 78 clocks = <&pclk>; 92 clocks = <&pclk>; 107 clocks = <&pclk>; 215 clocks = <&mxtal>; 223 clocks = <&mxtal>; 230 clocks = <&pll1>; 238 clocks = <&hclk>; [all …]
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D | dm816x-clocks.dtsi | 8 clocks = <&sys_clkin_ck &sys_clkin_ck>; 24 clocks = <&sys_clkin_ck &sys_clkin_ck>; 36 clocks = <&sys_clkin_ck &sys_clkin_ck>; 47 clocks = <&main_fapll 7>, < &sys_clkin_ck>; 88 clocks = <&main_fapll 5 &ddr_fapll 1 &video_fapll 1 96 clocks = <&clkout_pre_ck>; 105 clocks = <&clkout_div_ck>; 110 /* CM_DPLL clocks p1795 */ 114 clocks = <&main_fapll 1>; 122 clocks = <&main_fapll 2>; [all …]
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D | wm8750.dtsi | 75 clocks { 94 clocks = <&ref25>; 101 clocks = <&ref25>; 108 clocks = <&ref25>; 115 clocks = <&ref25>; 122 clocks = <&ref25>; 129 clocks = <&plla>; 136 clocks = <&pllb>; 143 clocks = <&pllb>; 150 clocks = <&plld>; [all …]
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D | omap44xx-clocks.dtsi | 23 clocks = <&pad_clks_src_ck>; 49 clocks = <&slimbus_src_clk>; 135 clocks = <&abe_dpll_refclk_mux_ck>, <&abe_dpll_bypass_clk_mux_ck>; 142 clocks = <&dpll_abe_ck>; 149 clocks = <&dpll_abe_x2_ck>; 160 clocks = <&dpll_abe_m2x2_ck>; 168 clocks = <&dpll_abe_m2x2_ck>; 178 clocks = <&dpll_abe_x2_ck>; 189 clocks = <&sys_clkin_ck>, <&dpll_abe_m3x2_ck>; 197 clocks = <&sys_clkin_ck>, <&core_hsd_byp_clk_mux_ck>; [all …]
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D | socfpga.dtsi | 85 clocks = <&l4_main_clk>; 104 clocks = <&can0_clk>; 113 clocks = <&can1_clk>; 122 clocks { 151 clocks = <&osc1>; 157 clocks = <&main_pll>; 165 clocks = <&main_pll>; 173 clocks = <&main_pll>, <&osc1>; 181 clocks = <&main_pll>; 188 clocks = <&main_pll>; [all …]
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D | keystone-clocks.dtsi | 8 clocks { 16 clocks = <&mainpllclk>, <&refclksys>; 26 clocks = <&mainmuxclk>; 35 clocks = <&mainmuxclk>; 44 clocks = <&mainmuxclk>; 54 clocks = <&mainmuxclk>; 64 clocks = <&chipclk1>; 73 clocks = <&chipclk1>; 82 clocks = <&papllclk>; 91 clocks = <&chipclk1>; [all …]
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D | bcm283x.dtsi | 130 clocks = <&clocks BCM2835_CLOCK_V3D>, 131 <&clocks BCM2835_CLOCK_PERI_IMAGE>, 132 <&clocks BCM2835_CLOCK_H264>, 133 <&clocks BCM2835_CLOCK_ISP>; 138 clocks: cprman@7e101000 { label 145 * pixel clocks come from the DSI analog PHY. 147 clocks = <&clk_osc>, 402 clocks = <&clocks BCM2835_CLOCK_UART>, 403 <&clocks BCM2835_CLOCK_VPU>; 412 clocks = <&clocks BCM2835_CLOCK_VPU>; [all …]
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D | exynos5410.dtsi | 72 clocks = <&fin_pll>; 86 clocks = <&fin_pll>, <&clock CLK_FOUT_EPLL>; 94 clocks = <&clock CLK_TMU>; 103 clocks = <&clock CLK_TMU>; 112 clocks = <&clock CLK_TMU>; 121 clocks = <&clock CLK_TMU>; 132 clocks = <&clock CLK_MMC0>, <&clock CLK_SCLK_MMC0>; 144 clocks = <&clock CLK_MMC1>, <&clock CLK_SCLK_MMC1>; 156 clocks = <&clock CLK_MMC2>, <&clock CLK_SCLK_MMC2>; 203 clocks = <&clock CLK_PDMA0>; [all …]
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D | r7s72100.dtsi | 30 /* Fixed factor clocks */ 34 clocks = <&cpg_clocks R7S72100_CLK_PLL>; 48 clocks = <&cpg_clocks R7S72100_CLK_I>; 53 /* External clocks */ 64 clocks = <&cpg_clocks R7S72100_CLK_PLL>; 72 clocks = <&cpg_clocks R7S72100_CLK_PLL>; 121 clocks = <&mstp4_clks R7S72100_CLK_SCIF0>; 134 clocks = <&mstp4_clks R7S72100_CLK_SCIF1>; 147 clocks = <&mstp4_clks R7S72100_CLK_SCIF2>; 160 clocks = <&mstp4_clks R7S72100_CLK_SCIF3>; [all …]
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