Home
last modified time | relevance | path

Searched refs:ctxs (Results 1 – 2 of 2) sorted by relevance

/arch/x86/mm/
Dtlb.c68 this_cpu_write(cpu_tlbstate.ctxs[asid].ctx_id, 0); in clear_asid_other()
91 if (this_cpu_read(cpu_tlbstate.ctxs[asid].ctx_id) != in choose_new_asid()
96 *need_flush = (this_cpu_read(cpu_tlbstate.ctxs[asid].tlb_gen) < in choose_new_asid()
334 VM_WARN_ON(this_cpu_read(cpu_tlbstate.ctxs[prev_asid].ctx_id) != in switch_mm_irqs_off()
362 if (this_cpu_read(cpu_tlbstate.ctxs[prev_asid].tlb_gen) == in switch_mm_irqs_off()
415 this_cpu_write(cpu_tlbstate.ctxs[new_asid].ctx_id, next->context.ctx_id); in switch_mm_irqs_off()
416 this_cpu_write(cpu_tlbstate.ctxs[new_asid].tlb_gen, next_tlb_gen); in switch_mm_irqs_off()
507 this_cpu_write(cpu_tlbstate.ctxs[0].ctx_id, mm->context.ctx_id); in initialize_tlbstate_and_flush()
508 this_cpu_write(cpu_tlbstate.ctxs[0].tlb_gen, tlb_gen); in initialize_tlbstate_and_flush()
511 this_cpu_write(cpu_tlbstate.ctxs[i].ctx_id, 0); in initialize_tlbstate_and_flush()
[all …]
/arch/x86/include/asm/
Dtlbflush.h241 struct tlb_context ctxs[TLB_NR_DYN_ASIDS]; member