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/arch/sparc/vdso/
Dvma.c68 static void *one_section64(struct vdso_elfinfo64 *e, const char *name, in one_section64() argument
75 shdrs = (void *)e->hdr + e->hdr->e_shoff; in one_section64()
76 snames = (void *)e->hdr + shdrs[e->hdr->e_shstrndx].sh_offset; in one_section64()
77 for (i = 1; i < e->hdr->e_shnum; i++) { in one_section64()
81 return (void *)e->hdr + shdrs[i].sh_offset; in one_section64()
89 struct vdso_elfinfo64 *e = &_e->u.elf64; in find_sections64() local
91 e->hdr = image->data; in find_sections64()
92 e->dynsym = one_section64(e, ".dynsym", &e->dynsymsize); in find_sections64()
93 e->dynstr = one_section64(e, ".dynstr", NULL); in find_sections64()
95 if (!e->dynsym || !e->dynstr) { in find_sections64()
[all …]
/arch/x86/kvm/
Dirq_comm.c30 static int kvm_set_pic_irq(struct kvm_kernel_irq_routing_entry *e, in kvm_set_pic_irq() argument
35 return kvm_pic_set_irq(pic, e->irqchip.pin, irq_source_id, level); in kvm_set_pic_irq()
38 static int kvm_set_ioapic_irq(struct kvm_kernel_irq_routing_entry *e, in kvm_set_ioapic_irq() argument
43 return kvm_ioapic_set_irq(ioapic, e->irqchip.pin, irq_source_id, level, in kvm_set_ioapic_irq()
104 void kvm_set_msi_irq(struct kvm *kvm, struct kvm_kernel_irq_routing_entry *e, in kvm_set_msi_irq() argument
107 trace_kvm_msi_set_irq(e->msi.address_lo | (kvm->arch.x2apic_format ? in kvm_set_msi_irq()
108 (u64)e->msi.address_hi << 32 : 0), in kvm_set_msi_irq()
109 e->msi.data); in kvm_set_msi_irq()
111 irq->dest_id = (e->msi.address_lo & in kvm_set_msi_irq()
114 irq->dest_id |= MSI_ADDR_EXT_DEST_ID(e->msi.address_hi); in kvm_set_msi_irq()
[all …]
Dioapic.c108 union kvm_ioapic_redirect_entry *e; in __rtc_irq_eoi_tracking_restore_one() local
110 e = &ioapic->redirtbl[RTC_GSI]; in __rtc_irq_eoi_tracking_restore_one()
111 if (!kvm_apic_match_dest(vcpu, NULL, 0, e->fields.dest_id, in __rtc_irq_eoi_tracking_restore_one()
112 e->fields.dest_mode)) in __rtc_irq_eoi_tracking_restore_one()
115 new_val = kvm_apic_pending_eoi(vcpu, e->fields.vector); in __rtc_irq_eoi_tracking_restore_one()
123 dest_map->vectors[vcpu->vcpu_id] = e->fields.vector; in __rtc_irq_eoi_tracking_restore_one()
238 union kvm_ioapic_redirect_entry *e; in kvm_ioapic_scan_entry() local
249 e = &ioapic->redirtbl[index]; in kvm_ioapic_scan_entry()
250 if (e->fields.trig_mode == IOAPIC_LEVEL_TRIG || in kvm_ioapic_scan_entry()
254 e->fields.dest_id, e->fields.dest_mode) || in kvm_ioapic_scan_entry()
[all …]
/arch/x86/crypto/
Dsha256-ssse3-asm.S97 e = %edx define
139 f = e
140 e = d define
151 mov e, y0 # y0 = e
152 ror $(25-11), y0 # y0 = e >> (25-11)
156 xor e, y0 # y0 = e ^ (e >> (25-11))
158 ror $(11-6), y0 # y0 = (e >> (11-6)) ^ (e >> (25-6))
163 xor e, y0 # y0 = e ^ (e >> (11-6)) ^ (e >> (25-6))
164 and e, y2 # y2 = (f^g)&e
169 ror $6, y0 # y0 = S1 = (e>>6) & (e>>11) ^ (e>>25)
[all …]
Dsha256-avx-asm.S105 e = %edx define
146 f = e
147 e = d define
158 mov e, y0 # y0 = e
159 MY_ROR (25-11), y0 # y0 = e >> (25-11)
163 xor e, y0 # y0 = e ^ (e >> (25-11))
165 MY_ROR (11-6), y0 # y0 = (e >> (11-6)) ^ (e >> (25-6))
169 xor e, y0 # y0 = e ^ (e >> (11-6)) ^ (e >> (25-6))
170 and e, y2 # y2 = (f^g)&e
175 MY_ROR 6, y0 # y0 = S1 = (e>>6) & (e>>11) ^ (e>>25)
[all …]
Dsha256-avx2-asm.S98 e = %edx # clobbers NUM_BLKS define
148 f = e
149 e = d define
160 rorx $25, e, y0 # y0 = e >> 25 # S1A
161 rorx $11, e, y1 # y1 = e >> 11 # S1B
169 xor y1, y0 # y0 = (e>>25) ^ (e>>11) # S1
171 vpaddd X0, XTMP0, XTMP0 # XTMP0 = W[-7] + W[-16]# y1 = (e >> 6)# S1
172 rorx $6, e, y1 # y1 = (e >> 6) # S1
174 and e, y2 # y2 = (f^g)&e # CH
175 xor y1, y0 # y0 = (e>>25) ^ (e>>11) ^ (e>>6) # S1
[all …]
Dsha512-avx2-asm.S82 e = %rdx define
152 f = e
153 e = d define
187 rorx $41, e, y0 # y0 = e >> 41 # S1A
188 rorx $18, e, y1 # y1 = e >> 18 # S1B
194 xor y1, y0 # y0 = (e>>41) ^ (e>>18) # S1
196 rorx $14, e, y1 # y1 = (e >> 14) # S1
198 and e, y2 # y2 = (f^g)&e # CH
199 xor y1, y0 # y0 = (e>>41) ^ (e>>18) ^ (e>>14) # S1
207 xor g, y2 # y2 = CH = ((f^g)&e)^g # CH
[all …]
/arch/powerpc/crypto/
Daes-tab-4k.S44 .long R(8e, 47, 47, c9), R(fb, f0, f0, 0b)
51 .long R(6c, 36, 36, 5a), R(7e, 3f, 3f, 41)
58 .long R(46, 23, 23, 65), R(9d, c3, c3, 5e)
61 .long R(0e, 07, 07, 09), R(24, 12, 12, 36)
63 .long R(cd, eb, eb, 26), R(4e, 27, 27, 69)
65 .long R(12, 09, 09, 1b), R(1d, 83, 83, 9e)
66 .long R(58, 2c, 2c, 74), R(34, 1a, 1a, 2e)
67 .long R(36, 1b, 1b, 2d), R(dc, 6e, 6e, b2)
71 .long R(52, 29, 29, 7b), R(dd, e3, e3, 3e)
72 .long R(5e, 2f, 2f, 71), R(13, 84, 84, 97)
[all …]
Dsha1-spe-asm.S106 #define R_00_15(a, b, c, d, e, w0, w1, k, off) \ argument
113 add e,e,rT0; /* 1: E = E + A' */ \
115 add e,e,w0; /* 1: E = E + W */ \
117 add e,e,rT2; /* 1: E = E + F */ \
119 add e,e,rK; /* 1: E = E + K */ \
123 rotrwi rT0,e,27; /* 2: A' = A rotl 5 */ \
130 #define R_16_19(a, b, c, d, e, w0, w1, w4, w6, w7, k) \ argument
137 add e,e,rT1; /* 1: E = E + F */ \
141 add e,e,rT2; /* 1: E = E + A' */ \
146 add e,e,rT0; /* 1: E = E + WK */ \
[all …]
/arch/xtensa/mm/
Dtlb.c30 int e = w + (i << PAGE_SHIFT); in __flush_itlb_all() local
31 invalidate_itlb_entry_no_isync(e); in __flush_itlb_all()
43 int e = w + (i << PAGE_SHIFT); in __flush_dtlb_all() local
44 invalidate_dtlb_entry_no_isync(e); in __flush_dtlb_all()
214 static int check_tlb_entry(unsigned w, unsigned e, bool dtlb) in check_tlb_entry() argument
216 unsigned tlbidx = w | (e << PAGE_SHIFT); in check_tlb_entry()
221 unsigned vpn = (r0 & PAGE_MASK) | (e << PAGE_SHIFT); in check_tlb_entry()
230 dtlb ? 'D' : 'I', w, e, vpn, in check_tlb_entry()
238 dtlb ? 'D' : 'I', w, e, r0, r1, pte); in check_tlb_entry()
259 unsigned w, e; in check_tlb_sanity() local
[all …]
/arch/parisc/kernel/
Dunwind.c49 const struct unwind_table_entry *e = NULL; in find_unwind_entry_in_table() local
57 e = &table->table[mid]; in find_unwind_entry_in_table()
58 if (addr < e->region_start) in find_unwind_entry_in_table()
60 else if (addr > e->region_end) in find_unwind_entry_in_table()
63 return e; in find_unwind_entry_in_table()
73 const struct unwind_table_entry *e = NULL; in find_unwind_entry() local
77 e = find_unwind_entry_in_table(&kernel_unwind_table, addr); in find_unwind_entry()
85 e = find_unwind_entry_in_table(table, addr); in find_unwind_entry()
86 if (e) { in find_unwind_entry()
95 return e; in find_unwind_entry()
[all …]
/arch/x86/include/asm/
Dpgtable_64.h34 #define pte_ERROR(e) \ argument
36 __FILE__, __LINE__, &(e), pte_val(e))
37 #define pmd_ERROR(e) \ argument
39 __FILE__, __LINE__, &(e), pmd_val(e))
40 #define pud_ERROR(e) \ argument
42 __FILE__, __LINE__, &(e), pud_val(e))
45 #define p4d_ERROR(e) \ argument
47 __FILE__, __LINE__, &(e), p4d_val(e))
50 #define pgd_ERROR(e) \ argument
52 __FILE__, __LINE__, &(e), pgd_val(e))
Dpgtable-3level.h14 #define pte_ERROR(e) \ argument
16 __FILE__, __LINE__, &(e), (e).pte_high, (e).pte_low)
17 #define pmd_ERROR(e) \ argument
19 __FILE__, __LINE__, &(e), pmd_val(e))
20 #define pgd_ERROR(e) \ argument
22 __FILE__, __LINE__, &(e), pgd_val(e))
/arch/ia64/include/asm/
Dexception.h9 const struct exception_table_entry *e);
14 const struct exception_table_entry *e; \
15 e = search_exception_tables((regs)->cr_iip + ia64_psr(regs)->ri); \
16 if (e) { \
17 ia64_handle_exception(regs, e); \
/arch/mips/kernel/
Djump_label.c38 void arch_jump_label_transform(struct jump_entry *e, in arch_jump_label_transform() argument
45 insn_p = (union mips_instruction *)msk_isa16_mode(e->code); in arch_jump_label_transform()
48 BUG_ON((e->target & J_ALIGN_MASK) != J_ISA_BIT); in arch_jump_label_transform()
52 offset = e->target - ((unsigned long)insn_p + 4); in arch_jump_label_transform()
69 WARN_ON((e->target & ~J_RANGE_MASK) != in arch_jump_label_transform()
70 ((e->code + 4) & ~J_RANGE_MASK)); in arch_jump_label_transform()
73 insn.j_format.target = e->target >> J_RANGE_SHIFT; in arch_jump_label_transform()
/arch/um/include/asm/
Dpgtable-2level.h29 #define pte_ERROR(e) \ argument
30 printk("%s:%d: bad pte %p(%08lx).\n", __FILE__, __LINE__, &(e), \
31 pte_val(e))
32 #define pgd_ERROR(e) \ argument
33 printk("%s:%d: bad pgd %p(%08lx).\n", __FILE__, __LINE__, &(e), \
34 pgd_val(e))
Dpgtable-3level.h47 #define pte_ERROR(e) \ argument
48 printk("%s:%d: bad pte %p(%016lx).\n", __FILE__, __LINE__, &(e), \
49 pte_val(e))
50 #define pmd_ERROR(e) \ argument
51 printk("%s:%d: bad pmd %p(%016lx).\n", __FILE__, __LINE__, &(e), \
52 pmd_val(e))
53 #define pgd_ERROR(e) \ argument
54 printk("%s:%d: bad pgd %p(%016lx).\n", __FILE__, __LINE__, &(e), \
55 pgd_val(e))
/arch/arc/include/asm/
Dtlbflush.h23 #define flush_tlb_range(vma, s, e) local_flush_tlb_range(vma, s, e) argument
25 #define flush_tlb_kernel_range(s, e) local_flush_tlb_kernel_range(s, e) argument
29 #define flush_pmd_tlb_range(vma, s, e) local_flush_pmd_tlb_range(vma, s, e) argument
Dlinkage.h13 .macro ST2 e, o, off
15 std \e, [sp, \off]
17 st \e, [sp, \off]
22 .macro LD2 e, o, off
24 ldd \e, [sp, \off]
26 ld \e, [sp, \off]
/arch/x86/boot/
Dcpu.c41 u32 e = err_flags[i]; in show_cap_strs() local
50 if (e & 1) { in show_cap_strs()
58 e >>= 1; in show_cap_strs()
63 u32 e = err_flags[i]; in show_cap_strs() local
65 if (e & 1) in show_cap_strs()
67 e >>= 1; in show_cap_strs()
/arch/powerpc/lib/
Drheap.c30 static inline void fixup(unsigned long s, unsigned long e, int d, in fixup() argument
36 if (*pp >= s && *pp < e) in fixup()
40 if (*pp >= s && *pp < e) in fixup()
158 unsigned long s, e, bs, be; in attach_free_block() local
164 e = s + size; in attach_free_block()
184 if (e == bs) in attach_free_block()
196 if (after && e != after->start) in attach_free_block()
332 unsigned long s, e, m; in rh_attach_region() local
337 e = s + size; in rh_attach_region()
344 e = e & ~m; in rh_attach_region()
[all …]
/arch/powerpc/kvm/
De500.c366 sregs->u.e.features |= KVM_SREGS_E_ARCH206_MMU | KVM_SREGS_E_SPE | in kvmppc_core_get_sregs_e500()
368 sregs->u.e.impl_id = KVM_SREGS_E_IMPL_FSL; in kvmppc_core_get_sregs_e500()
370 sregs->u.e.impl.fsl.features = 0; in kvmppc_core_get_sregs_e500()
371 sregs->u.e.impl.fsl.svr = vcpu_e500->svr; in kvmppc_core_get_sregs_e500()
372 sregs->u.e.impl.fsl.hid0 = vcpu_e500->hid0; in kvmppc_core_get_sregs_e500()
373 sregs->u.e.impl.fsl.mcar = vcpu_e500->mcar; in kvmppc_core_get_sregs_e500()
375 sregs->u.e.ivor_high[0] = vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_UNAVAIL]; in kvmppc_core_get_sregs_e500()
376 sregs->u.e.ivor_high[1] = vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_DATA]; in kvmppc_core_get_sregs_e500()
377 sregs->u.e.ivor_high[2] = vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_ROUND]; in kvmppc_core_get_sregs_e500()
378 sregs->u.e.ivor_high[3] = in kvmppc_core_get_sregs_e500()
[all …]
De500mc.c219 sregs->u.e.features |= KVM_SREGS_E_ARCH206_MMU | KVM_SREGS_E_PM | in kvmppc_core_get_sregs_e500mc()
221 sregs->u.e.impl_id = KVM_SREGS_E_IMPL_FSL; in kvmppc_core_get_sregs_e500mc()
223 sregs->u.e.impl.fsl.features = 0; in kvmppc_core_get_sregs_e500mc()
224 sregs->u.e.impl.fsl.svr = vcpu_e500->svr; in kvmppc_core_get_sregs_e500mc()
225 sregs->u.e.impl.fsl.hid0 = vcpu_e500->hid0; in kvmppc_core_get_sregs_e500mc()
226 sregs->u.e.impl.fsl.mcar = vcpu_e500->mcar; in kvmppc_core_get_sregs_e500mc()
230 sregs->u.e.ivor_high[3] = in kvmppc_core_get_sregs_e500mc()
232 sregs->u.e.ivor_high[4] = vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL]; in kvmppc_core_get_sregs_e500mc()
233 sregs->u.e.ivor_high[5] = vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL_CRIT]; in kvmppc_core_get_sregs_e500mc()
244 if (sregs->u.e.impl_id == KVM_SREGS_E_IMPL_FSL) { in kvmppc_core_set_sregs_e500mc()
[all …]
/arch/arm64/include/asm/
Desr.h229 #define esr_sys64_to_sysreg(e) \ argument
230 sys_reg((((e) & ESR_ELx_SYS64_ISS_OP0_MASK) >> \
232 (((e) & ESR_ELx_SYS64_ISS_OP1_MASK) >> \
234 (((e) & ESR_ELx_SYS64_ISS_CRN_MASK) >> \
236 (((e) & ESR_ELx_SYS64_ISS_CRM_MASK) >> \
238 (((e) & ESR_ELx_SYS64_ISS_OP2_MASK) >> \
241 #define esr_cp15_to_sysreg(e) \ argument
243 (((e) & ESR_ELx_SYS64_ISS_OP1_MASK) >> \
245 (((e) & ESR_ELx_SYS64_ISS_CRN_MASK) >> \
247 (((e) & ESR_ELx_SYS64_ISS_CRM_MASK) >> \
[all …]
/arch/arm64/crypto/
Dsha512-core.S_shipped105 orr x17,x17,x19 // Ch(e,f,g)
107 eor x16,x16,x6,ror#18 // Sigma1(e)
109 add x27,x27,x17 // h+=Ch(e,f,g)
111 add x27,x27,x16 // h+=Sigma1(e)
130 orr x17,x17,x28 // Ch(e,f,g)
132 eor x16,x16,x7,ror#18 // Sigma1(e)
134 add x26,x26,x17 // h+=Ch(e,f,g)
136 add x26,x26,x16 // h+=Sigma1(e)
154 orr x17,x17,x19 // Ch(e,f,g)
156 eor x16,x16,x8,ror#18 // Sigma1(e)
[all …]

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