Searched refs:irqstat (Results 1 – 6 of 6) sorted by relevance
/arch/arm/mach-footbridge/include/mach/ |
D | entry-macro.S | 24 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 25 ldr \irqstat, [\base, #0x180] @ get interrupts 28 tst \irqstat, #IRQ_MASK_SDRAMPARITY 31 tst \irqstat, #IRQ_MASK_UART_RX 35 tst \irqstat, #IRQ_MASK_DMA1 39 tst \irqstat, #IRQ_MASK_DMA2 43 tst \irqstat, #IRQ_MASK_IN0 47 tst \irqstat, #IRQ_MASK_IN1 51 tst \irqstat, #IRQ_MASK_IN2 55 tst \irqstat, #IRQ_MASK_IN3 [all …]
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/arch/arm/include/asm/hardware/ |
D | entry-macro-iomd.S | 14 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 15 ldrb \irqstat, [\base, #IOMD_IRQREQB] @ get high priority first 17 teq \irqstat, #0 19 ldrbeq \irqstat, [\base, #IOMD_DMAREQ] @ get dma 21 teqeq \irqstat, #0 24 ldrbeq \irqstat, [\base, #IOMD_IRQREQA] @ get low priority 26 teqeq \irqstat, #0 28 ldrbeq \irqstat, [\base, #IOMD_IRQREQC] 30 teqeq \irqstat, #0 33 ldrbeq \irqstat, [\base, #IOMD_IRQREQD] [all …]
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/arch/arm/mach-iop32x/include/mach/ |
D | entry-macro.S | 19 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 20 mrc p6, 0, \irqstat, c8, c0, 0 @ Read IINTSRC 21 cmp \irqstat, #0 22 clzne \irqnr, \irqstat
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/arch/arm64/include/asm/ |
D | arch_gicv3.h | 43 u64 irqstat; in gic_read_iar_common() local 45 irqstat = read_sysreg_s(SYS_ICC_IAR1_EL1); in gic_read_iar_common() 47 return irqstat; in gic_read_iar_common() 59 u64 irqstat; in gic_read_iar_cavium_thunderx() local 62 irqstat = read_sysreg_s(SYS_ICC_IAR1_EL1); in gic_read_iar_cavium_thunderx() 66 return irqstat; in gic_read_iar_cavium_thunderx()
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/arch/arm/include/asm/ |
D | arch_gicv3.h | 193 u32 irqstat = read_sysreg(ICC_IAR1); in gic_read_iar() local 197 return irqstat; in gic_read_iar()
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/arch/unicore32/kernel/ |
D | entry.S | 90 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 92 ldw \irqstat, [\base+], #0xC @ INTC_ICIP 94 and.a \irqstat, \irqstat, \tmp 96 cntlz \irqnr, \irqstat
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