| /arch/ia64/kernel/ |
| D | traps.c | 233 fp_emulate (int fp_fault, void *bundle, long *ipsr, long *fpsr, long *isr, long *pr, long *ifs, in fp_emulate() argument
265 (unsigned long *) isr, (unsigned long *) pr, in fp_emulate()
284 handle_fpu_swa (int fp_fault, struct pt_regs *regs, unsigned long isr) in handle_fpu_swa() argument
323 current->comm, task_pid_nr(current), regs->cr_iip + ia64_psr(regs)->ri, isr); in handle_fpu_swa()
328 exception = fp_emulate(fp_fault, bundle, ®s->cr_ipsr, ®s->ar_fpsr, &isr, ®s->pr, in handle_fpu_swa()
345 if (isr & 0x11) { in handle_fpu_swa()
347 } else if (isr & 0x22) { in handle_fpu_swa()
351 } else if (isr & 0x44) { in handle_fpu_swa()
356 0, __ISR_VALID, isr); in handle_fpu_swa()
367 if (isr & 0x880) { in handle_fpu_swa()
[all …]
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| /arch/ia64/mm/ |
| D | fault.c | 61 ia64_do_page_fault (unsigned long address, unsigned long isr, struct pt_regs *regs) in ia64_do_page_fault() argument
70 mask = ((((isr >> IA64_ISR_X_BIT) & 1UL) << VM_EXEC_BIT) in ia64_do_page_fault()
71 | (((isr >> IA64_ISR_W_BIT) & 1UL) << VM_WRITE_BIT)); in ia64_do_page_fault()
131 if (((isr >> IA64_ISR_R_BIT) & 1UL) && (!(vma->vm_flags & (VM_READ | VM_WRITE)))) in ia64_do_page_fault()
217 if ((isr & IA64_ISR_SP) in ia64_do_page_fault()
218 || ((isr & IA64_ISR_NA) && (isr & IA64_ISR_CODE_MASK) == IA64_ISR_CODE_LFETCH)) in ia64_do_page_fault()
230 0, __ISR_VALID, isr); in ia64_do_page_fault()
235 if ((isr & IA64_ISR_SP) in ia64_do_page_fault()
236 || ((isr & IA64_ISR_NA) && (isr & IA64_ISR_CODE_MASK) == IA64_ISR_CODE_LFETCH)) in ia64_do_page_fault()
271 if (die("Oops", regs, isr)) in ia64_do_page_fault()
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| /arch/mips/loongson64/lemote-2f/ |
| D | irq.c | 32 int irq, isr; in mach_i8259_irq() local
38 isr = inb(PIC_MASTER_CMD) & in mach_i8259_irq()
40 if (!isr) in mach_i8259_irq()
41 isr = (inb(PIC_SLAVE_CMD) & ~inb(PIC_SLAVE_IMR)) << 8; in mach_i8259_irq()
42 irq = ffs(isr) - 1; in mach_i8259_irq()
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| /arch/parisc/kernel/ |
| D | unaligned.c | 128 regs->isr, regs->ior, toreg); in emulate_ldh()
144 : "0" (val), "r" (saddr), "r" (regs->isr) in emulate_ldh()
162 regs->isr, regs->ior, toreg); in emulate_ldw()
182 : "0" (val), "r" (saddr), "r" (regs->isr) in emulate_ldw()
201 regs->isr, regs->ior, toreg); in emulate_ldd()
226 : "0" (val), "r" (saddr), "r" (regs->isr) in emulate_ldd()
252 : "0" (valh), "1" (vall), "r" (saddr), "r" (regs->isr) in emulate_ldd()
277 val, regs->isr, regs->ior); in emulate_sth()
293 : "r" (val), "r" (regs->ior), "r" (regs->isr) in emulate_sth()
312 val, regs->isr, regs->ior); in emulate_stw()
[all …]
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| D | kgdb.c | 82 gr->isr = regs->isr; in pt_regs_to_gdb_regs()
113 regs->isr = gr->isr; in gdb_regs_to_pt_regs()
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| D | traps.c | 144 level, regs->iir, regs->isr, regs->ior); in show_regs()
370 regs->isr = pim_wide->cr[20]; in transfer_pim_to_trap_frame()
394 regs->isr = pim_narrow->cr[20]; in transfer_pim_to_trap_frame()
666 fault_space = regs->isr; in handle_interruption()
680 fault_space = regs->isr; in handle_interruption()
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| D | ptrace.c | 466 case RI(isr): return regs->isr; in get_reg()
519 case RI(isr): return regs->isr; in set_reg()
764 REG_OFFSET_NAME(isr),
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| D | entry.S | 227 mfctl %isr,spc
241 mfctl %isr,spc
259 mfctl %isr, spc
273 mfctl %isr, spc
289 mfctl %isr,spc
301 mfctl %isr,spc
319 mfctl %isr,spc
333 mfctl %isr,spc
1060 mfctl %isr, %r16
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| /arch/parisc/include/uapi/asm/ |
| D | ptrace.h | 37 unsigned long isr; /* CR20 */ member
58 unsigned long isr; /* CR20 */ member
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| /arch/arm/mach-ixp4xx/ |
| D | common-pci.c | 82 unsigned long isr = *PCI_ISR; in check_master_abort() local
84 if (isr & PCI_ISR_PFE) { in check_master_abort()
292 u32 isr, status; in abort_handler() local
294 isr = *PCI_ISR; in abort_handler()
297 "status = %#x\n", addr, isr, status); in abort_handler()
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| /arch/mips/pci/ |
| D | pci-ar2315.c | 219 u32 value, isr; in ar2315_pci_cfg_access() local
235 isr = ar2315_pci_reg_read(apc, AR2315_PCI_ISR); in ar2315_pci_cfg_access()
237 if (isr & AR2315_PCI_INT_ABORT) in ar2315_pci_cfg_access()
243 isr = ar2315_pci_reg_read(apc, AR2315_PCI_ISR); in ar2315_pci_cfg_access()
244 if (isr & AR2315_PCI_INT_ABORT) in ar2315_pci_cfg_access()
262 return isr & AR2315_PCI_INT_ABORT ? PCIBIOS_DEVICE_NOT_FOUND : in ar2315_pci_cfg_access()
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| /arch/powerpc/platforms/powermac/ |
| D | low_i2c.c | 182 name, __kw_state_names[host->state], isr); \
212 u8 isr; in kw_i2c_wait_interrupt() local
215 isr = kw_read_reg(reg_isr) & KW_I2C_IRQ_MASK; in kw_i2c_wait_interrupt()
216 if (isr != 0) in kw_i2c_wait_interrupt()
217 return isr; in kw_i2c_wait_interrupt()
229 return isr; in kw_i2c_wait_interrupt()
240 static void kw_i2c_handle_interrupt(struct pmac_i2c_host_kw *host, u8 isr) in kw_i2c_handle_interrupt() argument
245 __kw_state_names[host->state], isr); in kw_i2c_handle_interrupt()
250 kw_write_reg(reg_isr, isr); in kw_i2c_handle_interrupt()
254 if (isr == 0) { in kw_i2c_handle_interrupt()
[all …]
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| /arch/ia64/include/asm/ |
| D | fpswa.h | 59 unsigned long *fsr, unsigned long *isr, unsigned long *preds,
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| D | mca.h | 99 unsigned long isr; member
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| /arch/parisc/include/asm/ |
| D | kgdb.h | 38 unsigned long isr; member
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| D | elf.h | 286 dst[46] = pt->isr; dst[47] = pt->ior; \
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| /arch/alpha/include/asm/ |
| D | mce.h | 32 unsigned long isr; /* Interrupt Status Reg. */ member
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| /arch/x86/kvm/ |
| D | i8259.c | 72 s->isr &= ~(1 << irq); in pic_clear_isr()
146 mask = s->isr; in pic_get_irq()
219 s->isr |= 1 << irq; in pic_intack()
336 priority = get_priority(s, s->isr); in pic_ioport_write()
405 s->pics_state->pics[0].isr &= ~(1 << 2); in pic_poll_read()
431 ret = s->isr; in pic_ioport_read()
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| D | irq.h | 33 u8 isr; /* interrupt service register */ member
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| /arch/powerpc/include/asm/ |
| D | mpc52xx_psc.h | 183 u16 isr; member
186 #define mpc52xx_psc_isr isr_imr.isr
328 u16 isr; /* PSC + 0x20 */ member
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| /arch/powerpc/sysdev/ |
| D | fsl_rmu.c | 119 u32 isr; member
252 int isr; in fsl_rio_rx_handler() local
256 isr = in_be32(&rmu->msg_regs->isr); in fsl_rio_rx_handler()
258 if (isr & RIO_MSG_ISR_TE) { in fsl_rio_rx_handler()
260 out_be32((void *)&rmu->msg_regs->isr, RIO_MSG_ISR_TE); in fsl_rio_rx_handler()
265 if (isr & RIO_MSG_ISR_DIQI) { in fsl_rio_rx_handler()
277 out_be32(&rmu->msg_regs->isr, RIO_MSG_ISR_DIQI); in fsl_rio_rx_handler()
885 out_be32(&rmu->msg_regs->isr, 0x00000091); in fsl_open_inb_mbox()
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| /arch/m68k/include/asm/ |
| D | mvme16xhw.h | 15 isr, member
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| /arch/mips/include/asm/mach-pmcs-msp71xx/ |
| D | msp_usb.h | 47 u32 isr; /* 0x0: Interrupt status */ member
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| /arch/x86/kernel/apic/ |
| D | apic.c | 1520 static bool apic_check_and_ack(union apic_ir *irr, union apic_ir *isr) in apic_check_and_ack() argument
1530 isr->regs[i] = apic_read(APIC_ISR + i * 0x10); in apic_check_and_ack()
1537 if (!bitmap_empty(isr->map, APIC_IR_BITS)) { in apic_check_and_ack()
1543 for_each_set_bit(bit, isr->map, APIC_IR_BITS) in apic_check_and_ack()
1567 union apic_ir irr, isr; in apic_pending_intr_clear() local
1572 if (!apic_check_and_ack(&irr, &isr)) in apic_pending_intr_clear()
1576 pr_warn("APIC: Stale IRR: %256pb ISR: %256pb\n", irr.map, isr.map); in apic_pending_intr_clear()
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| /arch/ia64/include/asm/native/ |
| D | inst.h | 18 mov reg = cr.isr
|