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Searched refs:mpll (Results 1 – 4 of 4) sorted by relevance

/arch/arm/mach-s3c24xx/
Dcpufreq-utils.c60 if (!IS_ERR(cfg->mpll)) in s3c2410_set_fvco()
61 clk_set_rate(cfg->mpll, cfg->pll.frequency); in s3c2410_set_fvco()
/arch/arm/boot/dts/
Dimx7ulp.dtsi90 mpll: clock-mpll { label
93 clock-output-names = "mpll";
261 <&firc>, <&upll>, <&mpll>;
263 "firc", "upll", "mpll";
285 "upll", "sosc_bus_clk", "mpll",
318 "upll", "sosc_bus_clk", "mpll",
Dexynos4412.dtsi650 "mcuispdiv1", "mpll", "aclk200",
/arch/arm/plat-samsung/include/plat/
Dcpu-freq-core.h118 struct clk *mpll; member