| /arch/x86/oprofile/ |
| D | op_model_ppro.c | 33 static void ppro_shutdown(struct op_msrs const * const msrs) in ppro_shutdown() argument
38 if (!msrs->counters[i].addr) in ppro_shutdown()
45 static int ppro_fill_in_addresses(struct op_msrs * const msrs) in ppro_fill_in_addresses() argument
57 msrs->counters[i].addr = MSR_P6_PERFCTR0 + i; in ppro_fill_in_addresses()
58 msrs->controls[i].addr = MSR_P6_EVNTSEL0 + i; in ppro_fill_in_addresses()
64 ppro_shutdown(msrs); in ppro_fill_in_addresses()
73 struct op_msrs const * const msrs) in ppro_setup_ctrs() argument
97 if (!msrs->controls[i].addr) in ppro_setup_ctrs()
99 rdmsrl(msrs->controls[i].addr, val); in ppro_setup_ctrs()
103 wrmsrl(msrs->controls[i].addr, val); in ppro_setup_ctrs()
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| D | op_model_amd.c | 133 struct op_msrs const * const msrs) in op_amd_handle_ibs() argument
269 struct op_msrs const * const msrs) in op_mux_switch_ctrl() argument
279 rdmsrl(msrs->controls[i].addr, val); in op_mux_switch_ctrl()
282 wrmsrl(msrs->controls[i].addr, val); in op_mux_switch_ctrl()
290 static void op_amd_shutdown(struct op_msrs const * const msrs) in op_amd_shutdown() argument
295 if (!msrs->counters[i].addr) in op_amd_shutdown()
302 static int op_amd_fill_in_addresses(struct op_msrs * const msrs) in op_amd_fill_in_addresses() argument
315 msrs->counters[i].addr = MSR_F15H_PERF_CTR + (i << 1); in op_amd_fill_in_addresses()
316 msrs->controls[i].addr = MSR_F15H_PERF_CTL + (i << 1); in op_amd_fill_in_addresses()
318 msrs->controls[i].addr = MSR_K7_EVNTSEL0 + i; in op_amd_fill_in_addresses()
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| D | nmi_int.c | 75 static void nmi_cpu_save_registers(struct op_msrs *msrs) in nmi_cpu_save_registers() argument
77 struct op_msr *counters = msrs->counters; in nmi_cpu_save_registers()
78 struct op_msr *controls = msrs->controls; in nmi_cpu_save_registers()
94 struct op_msrs const *msrs = this_cpu_ptr(&cpu_msrs); in nmi_cpu_start() local
95 if (!msrs->controls) in nmi_cpu_start()
98 model->start(msrs); in nmi_cpu_start()
114 struct op_msrs const *msrs = this_cpu_ptr(&cpu_msrs); in nmi_cpu_stop() local
115 if (!msrs->controls) in nmi_cpu_stop()
118 model->stop(msrs); in nmi_cpu_stop()
181 static void nmi_cpu_setup_mux(int cpu, struct op_msrs const * const msrs) in nmi_cpu_setup_mux() argument
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| D | op_x86_model.h | 43 int (*fill_in_addresses)(struct op_msrs * const msrs);
45 struct op_msrs const * const msrs);
47 struct op_msrs const * const msrs);
48 void (*start)(struct op_msrs const * const msrs);
49 void (*stop)(struct op_msrs const * const msrs);
50 void (*shutdown)(struct op_msrs const * const msrs);
53 struct op_msrs const * const msrs);
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| D | op_model_p4.c | 388 static void p4_shutdown(struct op_msrs const * const msrs) in p4_shutdown() argument
393 if (msrs->counters[i].addr) in p4_shutdown()
394 release_perfctr_nmi(msrs->counters[i].addr); in p4_shutdown()
402 if (msrs->controls[i].addr) in p4_shutdown()
403 release_evntsel_nmi(msrs->controls[i].addr); in p4_shutdown()
407 static int p4_fill_in_addresses(struct op_msrs * const msrs) in p4_fill_in_addresses() argument
420 msrs->counters[i].addr = addr; in p4_fill_in_addresses()
421 msrs->controls[i].addr = cccraddr; in p4_fill_in_addresses()
429 msrs->controls[i].addr = addr; in p4_fill_in_addresses()
438 msrs->controls[i].addr = addr; in p4_fill_in_addresses()
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| /arch/x86/kvm/vmx/ |
| D | nested.h | 20 void nested_vmx_setup_ctls_msrs(struct nested_vmx_msrs *msrs, u32 ept_caps,
33 int vmx_get_vmx_msr(struct nested_vmx_msrs *msrs, u32 msr_index, u64 *pdata);
118 return vmx_misc_cr3_count(to_vmx(vcpu)->nested.msrs.misc_low); in nested_cpu_vmx_misc_cr3_count()
128 return to_vmx(vcpu)->nested.msrs.misc_low & in nested_cpu_has_vmwrite_any_field()
134 return to_vmx(vcpu)->nested.msrs.misc_low & VMX_MISC_ZERO_LEN_INS; in nested_cpu_has_zero_length_injection()
139 return to_vmx(vcpu)->nested.msrs.procbased_ctls_high & in nested_cpu_supports_monitor_trap_flag()
145 return to_vmx(vcpu)->nested.msrs.secondary_ctls_high & in nested_cpu_has_vmx_shadow_vmcs()
261 u64 fixed0 = to_vmx(vcpu)->nested.msrs.cr0_fixed0; in nested_guest_cr0_valid()
262 u64 fixed1 = to_vmx(vcpu)->nested.msrs.cr0_fixed1; in nested_guest_cr0_valid()
265 if (to_vmx(vcpu)->nested.msrs.secondary_ctls_high & in nested_guest_cr0_valid()
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| D | nested.c | 352 to_vmx(vcpu)->nested.msrs.ept_caps & in nested_ept_init_mmu_context()
882 u64 vmx_misc = vmx_control_msr(vmx->nested.msrs.misc_low, in nested_vmx_max_atomic_switch_msrs()
883 vmx->nested.msrs.misc_high); in nested_vmx_max_atomic_switch_msrs()
1063 u64 vmx_basic = vmx->nested.msrs.basic; in vmx_restore_vmx_basic()
1082 vmx->nested.msrs.basic = data; in vmx_restore_vmx_basic()
1094 lowp = &vmx->nested.msrs.pinbased_ctls_low; in vmx_restore_control_msr()
1095 highp = &vmx->nested.msrs.pinbased_ctls_high; in vmx_restore_control_msr()
1098 lowp = &vmx->nested.msrs.procbased_ctls_low; in vmx_restore_control_msr()
1099 highp = &vmx->nested.msrs.procbased_ctls_high; in vmx_restore_control_msr()
1102 lowp = &vmx->nested.msrs.exit_ctls_low; in vmx_restore_control_msr()
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| D | evmcs.c | 364 vmx->nested.msrs.pinbased_ctls_high &= ~EVMCS1_UNSUPPORTED_PINCTRL; in nested_enable_evmcs()
365 vmx->nested.msrs.entry_ctls_high &= ~EVMCS1_UNSUPPORTED_VMENTRY_CTRL; in nested_enable_evmcs()
366 vmx->nested.msrs.exit_ctls_high &= ~EVMCS1_UNSUPPORTED_VMEXIT_CTRL; in nested_enable_evmcs()
367 vmx->nested.msrs.secondary_ctls_high &= ~EVMCS1_UNSUPPORTED_2NDEXEC; in nested_enable_evmcs()
368 vmx->nested.msrs.vmfunc_controls &= ~EVMCS1_UNSUPPORTED_VMFUNC; in nested_enable_evmcs()
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| D | vmx.c | 1827 return vmx_get_vmx_msr(&vmx->nested.msrs, msr_info->index, in vmx_get_msr()
4058 vmx->nested.msrs.secondary_ctls_high |= in vmx_compute_secondary_exec_control()
4061 vmx->nested.msrs.secondary_ctls_high &= in vmx_compute_secondary_exec_control()
4073 vmx->nested.msrs.secondary_ctls_high |= in vmx_compute_secondary_exec_control()
4076 vmx->nested.msrs.secondary_ctls_high &= in vmx_compute_secondary_exec_control()
4094 vmx->nested.msrs.secondary_ctls_high |= in vmx_compute_secondary_exec_control()
4097 vmx->nested.msrs.secondary_ctls_high &= in vmx_compute_secondary_exec_control()
4109 vmx->nested.msrs.secondary_ctls_high |= in vmx_compute_secondary_exec_control()
4112 vmx->nested.msrs.secondary_ctls_high &= in vmx_compute_secondary_exec_control()
4124 vmx->nested.msrs.secondary_ctls_high |= in vmx_compute_secondary_exec_control()
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| D | vmx.h | 173 struct nested_vmx_msrs msrs; member
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| /arch/x86/lib/ |
| D | msr.c | 11 struct msr *msrs = NULL; in msrs_alloc() local
13 msrs = alloc_percpu(struct msr); in msrs_alloc()
14 if (!msrs) { in msrs_alloc()
19 return msrs; in msrs_alloc()
23 void msrs_free(struct msr *msrs) in msrs_free() argument
25 free_percpu(msrs); in msrs_free()
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| D | msr-smp.c | 14 if (rv->msrs) in __rdmsr_on_cpu()
15 reg = per_cpu_ptr(rv->msrs, this_cpu); in __rdmsr_on_cpu()
28 if (rv->msrs) in __wrmsr_on_cpu()
29 reg = per_cpu_ptr(rv->msrs, this_cpu); in __wrmsr_on_cpu()
100 struct msr *msrs, in __rwmsr_on_cpus() argument
108 rv.msrs = msrs; in __rwmsr_on_cpus()
127 void rdmsr_on_cpus(const struct cpumask *mask, u32 msr_no, struct msr *msrs) in rdmsr_on_cpus() argument
129 __rwmsr_on_cpus(mask, msr_no, msrs, __rdmsr_on_cpu); in rdmsr_on_cpus()
141 void wrmsr_on_cpus(const struct cpumask *mask, u32 msr_no, struct msr *msrs) in wrmsr_on_cpus() argument
143 __rwmsr_on_cpus(mask, msr_no, msrs, __wrmsr_on_cpu); in wrmsr_on_cpus()
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| /arch/x86/include/asm/ |
| D | msr.h | 27 struct msr *msrs; member
334 void msrs_free(struct msr *msrs);
343 void rdmsr_on_cpus(const struct cpumask *mask, u32 msr_no, struct msr *msrs);
344 void wrmsr_on_cpus(const struct cpumask *mask, u32 msr_no, struct msr *msrs);
373 struct msr *msrs) in rdmsr_on_cpus() argument
375 rdmsr_on_cpu(0, msr_no, &(msrs[0].l), &(msrs[0].h)); in rdmsr_on_cpus()
378 struct msr *msrs) in wrmsr_on_cpus() argument
380 wrmsr_on_cpu(0, msr_no, msrs[0].l, msrs[0].h); in wrmsr_on_cpus()
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| /arch/x86/kernel/cpu/mce/ |
| D | amd.c | 591 u32 msrs[NR_BLOCKS]; in disable_err_thresholding() local
594 msrs[0] = 0x00000413; /* MC4_MISC0 */ in disable_err_thresholding()
595 msrs[1] = 0xc0000408; /* MC4_MISC1 */ in disable_err_thresholding()
603 msrs[0] = MSR_AMD64_SMCA_MCx_MISC(bank); in disable_err_thresholding()
618 msr_clear_bit(msrs[i], 62); in disable_err_thresholding()
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| /arch/x86/kvm/ |
| D | x86.c | 164 u32 msrs[KVM_NR_SHARED_MSRS]; member
257 wrmsrl(shared_msrs_global.msrs[slot], values->host); in kvm_on_user_return()
283 shared_msrs_global.msrs[slot] = msr; in kvm_define_shared_msr()
294 shared_msr_update(i, shared_msrs_global.msrs[i]); in kvm_shared_msr_cpu_online()
306 err = wrmsrl_safe(shared_msrs_global.msrs[slot], value); in kvm_set_shared_msr()
3139 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs, in __msr_io() argument
3146 for (i = 0; i < msrs->nmsrs; ++i) in __msr_io()
3163 struct kvm_msrs msrs; in msr_io() local
3169 if (copy_from_user(&msrs, user_msrs, sizeof(msrs))) in msr_io()
3173 if (msrs.nmsrs >= MAX_IO_MSRS) in msr_io()
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