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Searched refs:opcode (Results 1 – 25 of 141) sorted by relevance

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/arch/arm/nwfpe/
Dfpopcode.h192 #define getCoprocessorNumber(opcode) ((opcode & MASK_COPROCESSOR) >> 8) argument
195 #define getOffset(opcode) (opcode & MASK_OFFSET) argument
198 #define TEST_OPCODE(opcode,mask) (((opcode) & (mask)) == (mask)) argument
200 #define LOAD_OP(opcode) TEST_OPCODE((opcode),MASK_CPDT | BIT_LOAD) argument
201 #define STORE_OP(opcode) ((opcode & (MASK_CPDT | BIT_LOAD)) == MASK_CPDT) argument
203 #define LDF_OP(opcode) (LOAD_OP(opcode) && (getCoprocessorNumber(opcode) == 1)) argument
204 #define LFM_OP(opcode) (LOAD_OP(opcode) && (getCoprocessorNumber(opcode) == 2)) argument
205 #define STF_OP(opcode) (STORE_OP(opcode) && (getCoprocessorNumber(opcode) == 1)) argument
206 #define SFM_OP(opcode) (STORE_OP(opcode) && (getCoprocessorNumber(opcode) == 2)) argument
208 #define PREINDEXED(opcode) ((opcode & BIT_PREINDEX) != 0) argument
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Dfpa11_cpdt.c212 unsigned int PerformLDF(const unsigned int opcode) in PerformLDF() argument
215 unsigned int nRc = 1, write_back = WRITE_BACK(opcode); in PerformLDF()
217 pBase = (unsigned int __user *) readRegister(getRn(opcode)); in PerformLDF()
218 if (REG_PC == getRn(opcode)) { in PerformLDF()
224 if (BIT_UP_SET(opcode)) in PerformLDF()
225 pFinal += getOffset(opcode); in PerformLDF()
227 pFinal -= getOffset(opcode); in PerformLDF()
229 if (PREINDEXED(opcode)) in PerformLDF()
234 switch (opcode & MASK_TRANSFER_LENGTH) { in PerformLDF()
236 loadSingle(getFd(opcode), pAddress); in PerformLDF()
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Dfpa11_cprt.c18 unsigned int PerformFLT(const unsigned int opcode);
19 unsigned int PerformFIX(const unsigned int opcode);
21 static unsigned int PerformComparison(const unsigned int opcode);
23 unsigned int EmulateCPRT(const unsigned int opcode) in EmulateCPRT() argument
26 if (opcode & 0x800000) { in EmulateCPRT()
31 return PerformComparison(opcode); in EmulateCPRT()
35 switch ((opcode & 0x700000) >> 20) { in EmulateCPRT()
37 return PerformFLT(opcode); in EmulateCPRT()
40 return PerformFIX(opcode); in EmulateCPRT()
44 writeFPSR(readRegister(getRd(opcode))); in EmulateCPRT()
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Dfpa11.c35 int8 SetRoundingMode(const unsigned int opcode) in SetRoundingMode() argument
37 switch (opcode & MASK_ROUNDING_MODE) { in SetRoundingMode()
53 int8 SetRoundingPrecision(const unsigned int opcode) in SetRoundingPrecision() argument
56 switch (opcode & MASK_ROUNDING_PRECISION) { in SetRoundingPrecision()
85 unsigned int EmulateAll(unsigned int opcode) in EmulateAll() argument
90 printk("NWFPE: emulating opcode %08x\n", opcode); in EmulateAll()
92 code = opcode & 0x00000f00; in EmulateAll()
95 code = opcode & 0x0e000000; in EmulateAll()
97 if (opcode & 0x00000010) { in EmulateAll()
101 return EmulateCPRT(opcode); in EmulateAll()
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Dfpa11_cpdo.c14 unsigned int SingleCPDO(struct roundingData *roundData, const unsigned int opcode, FPREG * rFd);
15 unsigned int DoubleCPDO(struct roundingData *roundData, const unsigned int opcode, FPREG * rFd);
16 unsigned int ExtendedCPDO(struct roundingData *roundData, const unsigned int opcode, FPREG * rFd);
18 unsigned int EmulateCPDO(const unsigned int opcode) in EmulateCPDO() argument
27 nDest = getDestinationSize(opcode); in EmulateCPDO()
31 roundData.mode = SetRoundingMode(opcode); in EmulateCPDO()
32 roundData.precision = SetRoundingPrecision(opcode); in EmulateCPDO()
40 if (MONADIC_INSTRUCTION(opcode)) in EmulateCPDO()
43 nType = fpa11->fType[getFn(opcode)]; in EmulateCPDO()
45 if (!CONSTANT_FM(opcode)) { in EmulateCPDO()
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Dfpa11.h85 extern unsigned int EmulateAll(unsigned int opcode);
87 extern unsigned int EmulateCPDT(const unsigned int opcode);
88 extern unsigned int EmulateCPDO(const unsigned int opcode);
89 extern unsigned int EmulateCPRT(const unsigned int opcode);
92 extern unsigned int PerformLDF(const unsigned int opcode);
93 extern unsigned int PerformSTF(const unsigned int opcode);
94 extern unsigned int PerformLFM(const unsigned int opcode);
95 extern unsigned int PerformSFM(const unsigned int opcode);
100 const unsigned int opcode, FPREG * rFd);
103 const unsigned int opcode, FPREG * rFd);
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/arch/arm64/kernel/probes/
Dsimulate-insn.c51 static bool __kprobes check_cbz(u32 opcode, struct pt_regs *regs) in check_cbz() argument
53 int xn = opcode & 0x1f; in check_cbz()
55 return (opcode & (1 << 31)) ? in check_cbz()
59 static bool __kprobes check_cbnz(u32 opcode, struct pt_regs *regs) in check_cbnz() argument
61 int xn = opcode & 0x1f; in check_cbnz()
63 return (opcode & (1 << 31)) ? in check_cbnz()
67 static bool __kprobes check_tbz(u32 opcode, struct pt_regs *regs) in check_tbz() argument
69 int xn = opcode & 0x1f; in check_tbz()
70 int bit_pos = ((opcode & (1 << 31)) >> 26) | ((opcode >> 19) & 0x1f); in check_tbz()
75 static bool __kprobes check_tbnz(u32 opcode, struct pt_regs *regs) in check_tbnz() argument
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Dsimulate-insn.h11 void simulate_adr_adrp(u32 opcode, long addr, struct pt_regs *regs);
12 void simulate_b_bl(u32 opcode, long addr, struct pt_regs *regs);
13 void simulate_b_cond(u32 opcode, long addr, struct pt_regs *regs);
14 void simulate_br_blr_ret(u32 opcode, long addr, struct pt_regs *regs);
15 void simulate_cbz_cbnz(u32 opcode, long addr, struct pt_regs *regs);
16 void simulate_tbz_tbnz(u32 opcode, long addr, struct pt_regs *regs);
17 void simulate_ldr_literal(u32 opcode, long addr, struct pt_regs *regs);
18 void simulate_ldrsw_literal(u32 opcode, long addr, struct pt_regs *regs);
/arch/powerpc/include/asm/
Dtrace.h79 TP_PROTO(unsigned long opcode, unsigned long *args),
81 TP_ARGS(opcode, args),
86 __field(unsigned long, opcode)
90 __entry->opcode = opcode;
93 TP_printk("opcode=%lu", __entry->opcode),
100 TP_PROTO(unsigned long opcode, long retval, unsigned long *retbuf),
102 TP_ARGS(opcode, retval, retbuf),
107 __field(unsigned long, opcode)
112 __entry->opcode = opcode;
116 TP_printk("opcode=%lu retval=%ld", __entry->opcode, __entry->retval),
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/arch/c6x/kernel/
Dmodule.c15 u32 opcode; in fixup_pcr() local
22 opcode = *ip; in fixup_pcr()
23 opcode &= ~(mask << shift); in fixup_pcr()
24 opcode |= ((delta & mask) << shift); in fixup_pcr()
25 *ip = opcode; in fixup_pcr()
28 maskbits, ip, (void *)dest, opcode); in fixup_pcr()
49 u32 *location, opcode; in apply_relocate_add() local
84 opcode = *location; in apply_relocate_add()
85 opcode &= ~0x7fff80; in apply_relocate_add()
86 opcode |= ((v & 0xffff) << 7); in apply_relocate_add()
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/arch/sh/kernel/
Dtraps_64.c37 insn_size_t opcode; in read_opcode() local
46 get_user_error = __get_user(opcode, (insn_size_t *)aligned_pc); in read_opcode()
47 *result_opcode = opcode; in read_opcode()
82 insn_size_t opcode, in generate_and_check_address() argument
97 basereg = (opcode >> 20) & 0x3f; in generate_and_check_address()
101 displacement = (opcode >> 10) & 0x3ff; in generate_and_check_address()
107 offsetreg = (opcode >> 10) & 0x3f; in generate_and_check_address()
130 unaligned_fixups_notify(current, opcode, regs); in generate_and_check_address()
164 insn_size_t opcode, in misaligned_load() argument
174 error = generate_and_check_address(regs, opcode, in misaligned_load()
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Dkprobes.c42 kprobe_opcode_t opcode = *(kprobe_opcode_t *) (p->addr); in arch_prepare_kprobe() local
44 if (OPCODE_RTE(opcode)) in arch_prepare_kprobe()
47 p->opcode = opcode; in arch_prepare_kprobe()
55 p->opcode = *p->addr; in arch_copy_kprobe()
67 *p->addr = p->opcode; in arch_disarm_kprobe()
109 saved->opcode = 0; in arch_remove_kprobe()
116 saved->opcode = 0; in arch_remove_kprobe()
156 if (OPCODE_JSR(p->opcode) || OPCODE_JMP(p->opcode)) { in prepare_singlestep()
157 unsigned int reg_nr = ((p->opcode >> 8) & 0x000F); in prepare_singlestep()
159 } else if (OPCODE_BRA(p->opcode) || OPCODE_BSR(p->opcode)) { in prepare_singlestep()
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/arch/x86/mm/
Dpf_in.c103 static int get_opcode(unsigned char *addr, unsigned int *opcode) in get_opcode() argument
109 *opcode = *(unsigned short *)addr; in get_opcode()
112 *opcode = *addr; in get_opcode()
119 #define CHECK_OP_TYPE(opcode, array, type) \ argument
121 if (array[i] == opcode) { \
129 unsigned int opcode; in get_ins_type() local
137 p += get_opcode(p, &opcode); in get_ins_type()
139 CHECK_OP_TYPE(opcode, reg_rop, REG_READ); in get_ins_type()
140 CHECK_OP_TYPE(opcode, reg_wop, REG_WRITE); in get_ins_type()
141 CHECK_OP_TYPE(opcode, imm_wop, IMM_WRITE); in get_ins_type()
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/arch/powerpc/xmon/
Dppc-dis.c83 const struct powerpc_opcode *opcode; in lookup_powerpc() local
88 for (opcode = powerpc_opcodes; opcode < opcode_end; ++opcode) in lookup_powerpc()
94 if ((insn & opcode->mask) != opcode->opcode in lookup_powerpc()
96 && ((opcode->flags & dialect) == 0 in lookup_powerpc()
97 || (opcode->deprecated & dialect) != 0))) in lookup_powerpc()
102 for (opindex = opcode->operands; *opindex != 0; opindex++) in lookup_powerpc()
111 return opcode; in lookup_powerpc()
121 const struct powerpc_opcode *opcode; in print_insn_powerpc() local
153 opcode = NULL; in print_insn_powerpc()
156 if (opcode == NULL) in print_insn_powerpc()
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Dspu-dis.c34 int o = spu_opcodes[i].opcode; in init_spu_disassemble()
47 unsigned int opcode = insn >> (32-11); in get_index_for_opcode() local
54 if ((index = spu_disassemble_table[opcode & 0x780]) != 0 in get_index_for_opcode()
58 if ((index = spu_disassemble_table[opcode & 0x7f0]) != 0 in get_index_for_opcode()
62 if ((index = spu_disassemble_table[opcode & 0x7f8]) != 0 in get_index_for_opcode()
66 if ((index = spu_disassemble_table[opcode & 0x7fc]) != 0 in get_index_for_opcode()
70 if ((index = spu_disassemble_table[opcode & 0x7fe]) != 0 in get_index_for_opcode()
74 if ((index = spu_disassemble_table[opcode & 0x7ff]) != 0) in get_index_for_opcode()
/arch/x86/lib/
Dinat.c13 insn_attr_t inat_get_opcode_attribute(insn_byte_t opcode) in inat_get_opcode_attribute() argument
15 return inat_primary_table[opcode]; in inat_get_opcode_attribute()
26 insn_attr_t inat_get_escape_attribute(insn_byte_t opcode, int lpfx_id, in inat_get_escape_attribute() argument
37 if (inat_has_variant(table[opcode]) && lpfx_id) { in inat_get_escape_attribute()
42 return table[opcode]; in inat_get_escape_attribute()
65 insn_attr_t inat_get_avx_attribute(insn_byte_t opcode, insn_byte_t vex_m, in inat_get_avx_attribute() argument
75 if (!inat_is_group(table[opcode]) && vex_p) { in inat_get_avx_attribute()
81 return table[opcode]; in inat_get_avx_attribute()
/arch/s390/tools/
Dgen_opcode_table.c24 char opcode[STRING_SIZE_MAX]; member
35 char opcode[2]; member
158 rc = scanf("%s %s %s", insn.opcode, insn.name, insn.format); in read_instructions()
233 char *opcode; in print_opcode() local
235 opcode = insn->opcode; in print_opcode()
237 opcode += 2; in print_opcode()
238 printf("\t[%4d] = { .opfrag = 0x%s, .format = INSTR_%s, ", nr, opcode, insn->format); in print_opcode()
251 if (group && (!strncmp(group->opcode, insn->opcode, 2) || group->type->byte == 0)) { in add_to_group()
260 memcpy(group->opcode, insn->opcode, 2); in add_to_group()
268 return strcmp(((struct insn *)a)->opcode, ((struct insn *)b)->opcode); in cmpopcode()
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/arch/mips/include/uapi/asm/
Dinst.h627 __BITFIELD_FIELD(unsigned int opcode : 6, /* Jump format */
633 __BITFIELD_FIELD(unsigned int opcode : 6,
641 __BITFIELD_FIELD(unsigned int opcode : 6,
649 __BITFIELD_FIELD(unsigned int opcode : 6,
658 __BITFIELD_FIELD(unsigned int opcode : 6,
668 __BITFIELD_FIELD(unsigned int opcode : 6,
678 __BITFIELD_FIELD(unsigned int opcode : 6,
690 __BITFIELD_FIELD(unsigned int opcode : 6,
698 __BITFIELD_FIELD(unsigned int opcode : 6,
708 __BITFIELD_FIELD(unsigned int opcode : 6,
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/arch/arm/probes/
Ddecode-arm.h50 void __kprobes simulate_bbl(probes_opcode_t opcode,
52 void __kprobes simulate_blx1(probes_opcode_t opcode,
54 void __kprobes simulate_blx2bx(probes_opcode_t opcode,
56 void __kprobes simulate_mrs(probes_opcode_t opcode,
58 void __kprobes simulate_mov_ipsp(probes_opcode_t opcode,
/arch/x86/events/intel/
Dp4.c23 unsigned int opcode; /* Event code and ESCR selector */ member
73 .opcode = P4_OPCODE(P4_EVENT_TC_DELIVER_MODE),
87 .opcode = P4_OPCODE(P4_EVENT_BPU_FETCH_REQUEST),
94 .opcode = P4_OPCODE(P4_EVENT_ITLB_REFERENCE),
103 .opcode = P4_OPCODE(P4_EVENT_MEMORY_CANCEL),
111 .opcode = P4_OPCODE(P4_EVENT_MEMORY_COMPLETE),
119 .opcode = P4_OPCODE(P4_EVENT_LOAD_PORT_REPLAY),
126 .opcode = P4_OPCODE(P4_EVENT_STORE_PORT_REPLAY),
133 .opcode = P4_OPCODE(P4_EVENT_MOB_LOAD_REPLAY),
143 .opcode = P4_OPCODE(P4_EVENT_PAGE_WALK_TYPE),
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/arch/x86/include/asm/
Diosf_mbi.h71 int iosf_mbi_read(u8 port, u8 opcode, u32 offset, u32 *mdr);
83 int iosf_mbi_write(u8 port, u8 opcode, u32 offset, u32 mdr);
96 int iosf_mbi_modify(u8 port, u8 opcode, u32 offset, u32 mdr, u32 mask);
201 int iosf_mbi_read(u8 port, u8 opcode, u32 offset, u32 *mdr) in iosf_mbi_read() argument
208 int iosf_mbi_write(u8 port, u8 opcode, u32 offset, u32 mdr) in iosf_mbi_write() argument
215 int iosf_mbi_modify(u8 port, u8 opcode, u32 offset, u32 mdr, u32 mask) in iosf_mbi_modify() argument
Dtext-patching.h32 const char opcode[POKE_MAX_OPCODE_SIZE]; member
35 extern void text_poke_early(void *addr, const void *opcode, size_t len);
51 extern void *text_poke(void *addr, const void *opcode, size_t len);
52 extern void *text_poke_kgdb(void *addr, const void *opcode, size_t len);
54 extern void text_poke_bp(void *addr, const void *opcode, size_t len, void *handler);
/arch/x86/kernel/kprobes/
Dcore.c159 kprobe_opcode_t opcode; in can_boost() local
165 if (insn->opcode.nbytes == 2) in can_boost()
166 return test_bit(insn->opcode.bytes[1], in can_boost()
169 if (insn->opcode.nbytes != 1) in can_boost()
176 opcode = insn->opcode.bytes[0]; in can_boost()
178 switch (opcode & 0xf0) { in can_boost()
181 return (opcode != 0x62); in can_boost()
185 return opcode != 0x9a; /* can't boost call far */ in can_boost()
188 return (0xc1 < opcode && opcode < 0xcc) || opcode == 0xcf; in can_boost()
191 return (opcode == 0xd4 || opcode == 0xd5 || opcode == 0xd7); in can_boost()
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/arch/powerpc/platforms/powernv/
Dopal-tracepoints.c48 void __trace_opal_entry(unsigned long opcode, unsigned long *args) in __trace_opal_entry() argument
62 trace_opal_entry(opcode, args); in __trace_opal_entry()
69 void __trace_opal_exit(long opcode, unsigned long retval) in __trace_opal_exit() argument
82 trace_opal_exit(opcode, retval); in __trace_opal_exit()
/arch/mips/kernel/
Dtraps.c521 static inline int simulate_ll(struct pt_regs *regs, unsigned int opcode) in simulate_ll() argument
532 offset = opcode & OFFSET; in simulate_ll()
537 ((unsigned long)(regs->regs[(opcode & BASE) >> 21]) + offset); in simulate_ll()
555 regs->regs[(opcode & RT) >> 16] = value; in simulate_ll()
560 static inline int simulate_sc(struct pt_regs *regs, unsigned int opcode) in simulate_sc() argument
572 offset = opcode & OFFSET; in simulate_sc()
577 ((unsigned long)(regs->regs[(opcode & BASE) >> 21]) + offset); in simulate_sc()
578 reg = (opcode & RT) >> 16; in simulate_sc()
608 static int simulate_llsc(struct pt_regs *regs, unsigned int opcode) in simulate_llsc() argument
610 if ((opcode & OPCODE) == LL) { in simulate_llsc()
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