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Searched refs:phase (Results 1 – 18 of 18) sorted by relevance

/arch/powerpc/kvm/
Dbook3s_hv_builtin.c690 static void wait_for_sync(struct kvm_split_mode *sip, int phase) in wait_for_sync() argument
694 sip->lpcr_sync.phase[thr] |= phase; in wait_for_sync()
695 phase = ALL(phase); in wait_for_sync()
696 while ((sip->lpcr_sync.allphases & phase) != phase) { in wait_for_sync()
/arch/mips/include/asm/octeon/
Dcvmx-led-defs.h63 uint64_t phase:7; member
65 uint64_t phase:7;
/arch/x86/crypto/
Dghash-clmulni-intel_asm.S67 # first phase of the reduction
80 # second phase of the reduction
Daesni-intel_avx-x86_64.S915 #first phase of the reduction
926 vpxor \T2, \GH, \GH # first phase of the reduction complete
928 #second phase of the reduction
1549 #first phase of the reduction
1561 vpxor \T2, \T7, \T7 # first phase of the reduction complete
1575 #second phase of the reduction
1738 #first phase of the reduction
1749 vpxor \T2, \T7, \T7 # first phase of the reduction complete
1753 #second phase of the reduction
1898 #first phase of the reduction
[all …]
Daesni-intel_asm.S532 # first phase of the reduction
549 # second phase of the reduction
1150 # first phase of reduction
1166 # second phase of reduction
1362 # first phase of reduction
1378 # second phase of reduction
1462 # first phase of the reduction
1477 # second phase of the reduction
/arch/powerpc/include/asm/
Dkvm_book3s_asm.h85 u8 phase[4]; member
/arch/arm/boot/dts/
Drk3288-veyron-sdmmc.dtsi82 rockchip,default-sample-phase = <90>;
Drk3036-kylin.dts322 default-sample-phase = <90>;
Drk3288-veyron.dtsi180 rockchip,default-sample-phase = <158>;
Drk3036.dtsi266 default-sample-phase = <158>;
Dsocfpga_arria10.dtsi361 clk-phase = <0 135>;
Dsocfpga.dtsi458 clk-phase = <0 135>;
Drk322x.dtsi701 default-sample-phase = <158>;
/arch/arm64/boot/dts/rockchip/
Drk3368-lion-haikou.dts76 rockchip,default-sample-phase = <90>;
Drk3368-px5-evb.dts248 rockchip,default-sample-phase = <90>;
/arch/arm/mach-omap2/
Dsram243x.S53 orr r10, r10, #0x2 @ 90 degree phase for all below 133MHz
Dsram242x.S53 orr r10, r10, #0x2 @ 90 degree phase for all below 133MHz
/arch/x86/
DKconfig2558 may cause those machines to panic during the boot phase.