/arch/powerpc/kvm/ |
D | book3s_segment.S | 17 mr reg, r13 88 std r8, HSTATE_HOST_FSCR(r13) 90 ld r9, SVCPU_SHADOW_FSCR(r13) 140 PPC_LL r13, SVCPU_R13(r3) 175 std r9, HSTATE_SCRATCH2(r13) 176 ld r9, HSTATE_SCRATCH1(r13) 178 ld r9, HSTATE_SCRATCH2(r13) 181 stw r12, HSTATE_SCRATCH1(r13) /* CR is now in the low half */ 198 PPC_STL r0, SVCPU_R0(r13) 199 PPC_STL r1, SVCPU_R1(r13) [all …]
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D | book3s_rmhandlers.S | 47 mtspr SPRN_SPRG_SCRATCH0, r13 /* Save r13 */ 55 mfspr r13, SPRN_SPRG_THREAD 56 lwz r13, THREAD_KVM_SVCPU(r13) 60 cmpwi r13, 0 64 mfspr r13, SPRN_SPRG_SCRATCH0 /* r13 = original r13 */ 67 1: tophys(r13, r13) 68 stw r12, HSTATE_SCRATCH1(r13) 70 stw r12, HSTATE_SCRATCH0(r13) 71 lbz r12, HSTATE_IN_GUEST(r13) 75 lwz r12, HSTATE_SCRATCH1(r13) [all …]
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D | book3s_hv_interrupts.S | 47 std r3, HSTATE_DSCR(r13) 52 std r3, HSTATE_DABR(r13) 63 ld r5, HSTATE_KVM_VCORE(r13) 77 std r8,HSTATE_DECEXP(r13) 127 lbz r5, PACA_PMCINUSE(r13) /* is the host using the PMU? */ 133 std r7, HSTATE_MMCR0(r13) 134 std r5, HSTATE_MMCR1(r13) 135 std r6, HSTATE_MMCRA(r13) 136 std r9, HSTATE_SIAR(r13) 137 std r10, HSTATE_SDAR(r13) [all …]
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D | book3s_hv_rmhandlers.S | 76 std r10, HSTATE_HOST_MSR(r13) 90 ld r3, HSTATE_SPLIT_MODE(r13) 101 ld r4, HSTATE_KVM_VCPU(r13) 108 ld r5,HSTATE_DABR(r13) 115 ld r3,PACA_SPRG_VDSO(r13) 125 ld r3, HSTATE_DECEXP(r13) 132 stb r0, HSTATE_HWTHREAD_REQ(r13) 145 ld r7, HSTATE_HOST_MSR(r13) 185 ld r5, HSTATE_KVM_VCORE(r13) 194 ld r5, HSTATE_KVM_VCORE(r13) [all …]
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D | tm.S | 51 std r1, HSTATE_SCRATCH2(r13) 52 std r3, HSTATE_SCRATCH1(r13) 93 SET_SCRATCH0(r13) 94 GET_PACA(r13) 95 std r9, PACATMSCRATCH(r13) 96 ld r9, HSTATE_SCRATCH1(r13) 105 ld r1, HSTATE_SCRATCH2(r13) 113 ld r2, PACATOC(r13) 127 ld r4, PACATMSCRATCH(r13) 269 std r1, HSTATE_SCRATCH2(r13) [all …]
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/arch/openrisc/lib/ |
D | memset.S | 27 l.andi r13, r4, 0xff 30 l.sfeqi r13, 0 36 l.slli r15, r13, 16 // r13 = 000c, r15 = 0c00 37 l.or r13, r13, r15 // r13 = 0c0c, r15 = 0c00 38 l.slli r15, r13, 8 // r13 = 0c0c, r15 = c0c0 39 l.or r13, r13, r15 // r13 = cccc, r15 = c0c0 55 l.sb 0(r3), r13 // *src = c 63 l.sb 1(r3), r13 // *(src+1) = c 71 l.sb 2(r3), r13 // *(src+2) = c 76 2: l.sw 0(r19), r13 // *src = cccc [all …]
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/arch/arm/mach-imx/ |
D | ssi-fiq.S | 45 ldr r13, .L_imx_ssi_fiq_tx_buffer 61 add r13, r13, r10 63 ldrh r11, [r13] 66 ldrh r11, [r13, #2] 69 ldrh r11, [r13, #4] 72 ldrh r11, [r13, #6] 93 ldr r13, .L_imx_ssi_fiq_rx_buffer 99 add r13, r13, r10 105 strh r11, [r13] 108 strh r11, [r13, #2] [all …]
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/arch/powerpc/kernel/ |
D | exceptions-64s.S | 106 ld reg,PACAKBASE(r13); /* get high part of &label */ \ 110 ld reg,PACAKBASE(r13); \ 118 ld reg,PACAKBASE(r13); \ 133 #define SAVE_CTR(reg, area) mfctr reg ; std reg,area+EX_CTR(r13) 134 #define GET_CTR(reg, area) ld reg,area+EX_CTR(r13) 135 #define RESTORE_CTR(reg, area) ld reg,area+EX_CTR(r13) ; mtctr reg 149 ld ra,area+EX_PPR(r13); /* Read PPR from paca */ \ 155 ld ra,area+EX_PPR(r13); \ 180 std ra,offset(r13); \ 214 lbz r10,HSTATE_IN_GUEST(r13) [all …]
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D | head_fsl_booke.S | 444 stw r13, THREAD_NORMSAVE(2)(r10) 445 mfcr r13 446 stw r13, THREAD_NORMSAVE(3)(r10) 493 li r13,_PAGE_PRESENT 494 oris r13,r13,_PAGE_ACCESSED@h 496 li r13,_PAGE_PRESENT|_PAGE_ACCESSED 498 rlwimi r13,r12,11,29,29 501 andc. r13,r13,r11 /* Check permission */ 505 subf r13,r11,r12 /* create false data dep */ 506 lwzx r13,r11,r13 /* Get upper pte bits */ [all …]
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D | exceptions-64e.S | 65 lbz r9,PACAIRQHAPPENED(r13) 128 lbz r10,PACAIRQSOFTMASK(r13) 195 lbz r6,PACAIRQSOFTMASK(r13) 205 stb r5,PACAIRQSOFTMASK(r13) 214 stb r10,PACAIRQHAPPENED(r13) 247 std r10,\paca_ex+EX_R10(r13); 248 std r11,\paca_ex+EX_R11(r13); 255 ld r10,\paca_ex+EX_R10(r13) 256 ld r11,\paca_ex+EX_R11(r13) 257 mfspr r13,\scratch [all …]
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D | head_44x.S | 311 mtspr SPRN_SPRG_WSCRATCH3, r13 337 mfspr r13,SPRN_PID /* Get PID */ 338 rlwimi r12,r13,0,24,31 /* Set TID */ 357 li r13,_PAGE_PRESENT|_PAGE_ACCESSED 358 rlwimi r13,r12,10,30,30 374 andc. r13,r13,r12 /* Check permission */ 377 lwz r13,tlb_44x_index@l(r10) 382 addi r13,r13,1 386 0: cmpwi 0,r13,1 /* reserve entries */ 388 li r13,0 [all …]
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D | idle_book3e.S | 33 lbz r3,PACAIRQHAPPENED(r13) 47 stb r0,PACAIRQSOFTMASK(r13) 62 ld r11, PACACURRENT(r13) 72 lbz r10,PACAIRQHAPPENED(r13) 74 stb r10,PACAIRQHAPPENED(r13)
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D | head_64.S | 403 ldx r13,r9,r8 /* r13 = paca_ptrs[cpu id] */ 404 lhz r6,PACAHWCPUID(r13) /* Load HW procid from paca */ 414 2: SET_PACA(r13) 416 addi r12,r13,PACA_EXTLB /* and TLB exc frame in another */ 443 lbz r23,PACAPROCSTART(r13) /* Test if this processor should */ 452 ld r1,PACAEMERGSP(r13) 761 ldx r13,r5,r4 /* r13 = paca_ptrs[cpu id] */ 762 SET_PACA(r13) /* Save vaddr of paca in an SPRG*/ 768 stb r0,PACAIRQSOFTMASK(r13) 770 stb r0,PACAIRQHAPPENED(r13) [all …]
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D | idle_power4.S | 40 lbz r0,PACAIRQHAPPENED(r13) 62 stb r0,PACAIRQSOFTMASK(r13) /* we'll hard-enable shortly */ 67 ld r9, PACA_THREAD_INFO(r13) 82 stb r0,PACAIRQHAPPENED(r13)
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/arch/powerpc/include/asm/ |
D | irqflags.h | 50 lbz __rA,PACAIRQSOFTMASK(r13); \ 51 lbz __rB,PACAIRQHAPPENED(r13); \ 55 stb __rB,PACAIRQHAPPENED(r13); \ 57 stb __rA,PACAIRQSOFTMASK(r13); \ 66 lbz __rA,PACAIRQHAPPENED(r13); \ 69 stb __rB,PACAIRQSOFTMASK(r13); \ 70 stb __rA,PACAIRQHAPPENED(r13)
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D | exception-64e.h | 101 std r13,EX_TLB_R13(r12); \ 102 mfspr r13,SPRN_SPRG_PACA; \ 141 ld r13,EX_TLB_R13(r12); \ 154 addi r12,r13,PACA_EXTLB; \ 158 addi r11,r13,PACA_EXTLB; \ 173 addi r9,r13,MMSTAT_DSTATS+name; \ 176 addi r9,r13,MMSTAT_ISTATS+name; \ 179 ld r8,PACA_EXTLB+EX_TLB_ESR(r13); \ 182 addi r9,r13,MMSTAT_DSTATS+name; \ 184 61: addi r9,r13,MMSTAT_ISTATS+name; \ [all …]
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/arch/csky/abiv2/ |
D | memset.S | 15 andi r13, r0, 3 18 bnez r13, .L_dest_not_aligned 70 sub r13, r19, r13 71 sub r2, r13 75 PRE_BNEZAD (r13) 77 BNEZAD (r13, .L_dest_not_aligned_loop)
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D | memcpy.S | 14 andi r13, r0, 3 17 bnez r13, .L_dest_not_aligned 88 sub r13, r19, r13 89 sub r2, r13 94 PRE_BNEZAD (r13) 98 BNEZAD (r13, .L_dest_not_aligned_loop)
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D | memcmp.S | 15 andi r13, r0, 3 19 bnez r13, .L_s1_not_aligned 140 sub r13, r19, r13 141 sub r2, r13 147 PRE_BNEZAD (r13) 150 BNEZAD (r13, .L_s1_not_aligned_loop)
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D | memmove.S | 22 andi r13, r0, 3 24 bnez r13, .L_dest_not_aligned 90 sub r2, r13 96 PRE_BNEZAD (r13) 98 BNEZAD (r13, .L_dest_not_aligned_loop)
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/arch/s390/purgatory/ |
D | head.S | 66 lg %r4,kernel_entry-\base(%r13) 67 lg %r5,load_psw_mask-\base(%r13) 88 basr %r13,0 104 lg %r11,kernel_type-.base_crash(%r13) 129 lmg %r6,%r15,gprregs-.base_crash(%r13) 133 lpswe disabled_wait_psw-.base_crash(%r13) 137 lgr %r8,%r13 141 lg %r9,crash_size-.base_crash(%r13) 145 lg %r10,crash_start-.base_crash(%r13) 163 basr %r13,0 [all …]
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/arch/s390/boot/ |
D | head_kdump.S | 27 basr %r13,0 31 clgr %r2,%r13 # 60 basr %r13,0 # Base 77 lg %r14,.Lstartup_kdump-0b(%r13) 88 basr %r13,0 89 0: lpswe .Lrestart_psw-0b(%r13) # Start new kernel... 96 larl %r13,startup_kdump_crash 97 lpswe 0(%r13)
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/arch/csky/abiv1/inc/abi/ |
D | entry.h | 30 mtcr r13, ss2 31 mfcr r13, epsr 32 btsti r13, 31 39 stw r13, (sp, 12) 44 movi r13, \epc_inc 45 add lr, r13 59 mfcr r13, ss2 67 stw r13, (sp, 28) 99 ldw r13, (sp, 28)
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/arch/nios2/kernel/ |
D | insnemu.S | 33 ldw r13, PT_R13(sp) 128 stw r13, 52(sp) 280 movi r13, 0 /* remainder = 0 */ 303 slli r13, r13, 1 305 or r13, r13, r7 316 bltu r13, r5, div_skip 318 sub r13, r13, r5 559 ldw r13, 52(sp)
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/arch/s390/kernel/ |
D | head64.S | 28 larl %r13,.LPG1 # get base 51 lam 0,15,.Laregs-.LPG1(%r13) # load acrs needed by uaccess 56 basr %r13,0 57 lpswe .Ldw-.(%r13) # load disabled wait psw
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