/arch/sh/kernel/ |
D | head_64.S | 178 movi MMUIR_FIRST, r21 181 putcfg r21, 0, ZERO /* Clear MMUIR[n].PTEH.V */ 182 addi r21, MMUIR_STEP, r21 183 bne r21, r22, tr1 187 movi MMUDR_FIRST, r21 190 putcfg r21, 0, ZERO /* Clear MMUDR[n].PTEH.V */ 191 addi r21, MMUDR_STEP, r21 192 bne r21, r22, tr1 195 movi MMUIR_FIRST, r21 198 putcfg r21, 1, r22 /* Set MMUIR[0].PTEL */ [all …]
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/arch/sh/boot/compressed/ |
D | head_64.S | 65 movi ITLB_FIXED, r21 67 1: putcfg r21, 0, r63 /* Clear MMUIR[n].PTEH.V */ 68 addi r21, TLB_STEP, r21 69 bne r21, r22, tr1 73 movi DTLB_FIXED, r21 75 1: putcfg r21, 0, r63 /* Clear MMUDR[n].PTEH.V */ 76 addi r21, TLB_STEP, r21 77 bne r21, r22, tr1 80 movi ITLB_FIXED, r21 82 putcfg r21, 1, r22 /* Set MMUIR[0].PTEL */ [all …]
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/arch/sh/lib64/ |
D | sdivsi3.S | 19 shari r25, 58, r21 /* extract 5(6) bit index (s2.4 with hole -1..1) */ 21 ldx.ub r20, r21, r19 /* u0.8 */ 23 shlli r21, 1, r21 25 ldx.w r20, r21, r21 /* s2.14 */ 28 sub r21, r19, r19 /* some 11 bit inverse in s1.14 */ 29 muls.l r19, r19, r21 /* u0.28 */ 32 muls.l r25, r21, r18 /* s2.58 */ 46 xor r21, r0, r21 /* You could also use the constant 1 << 27. */ 47 add r21, r25, r21 48 sub r21, r19, r21 [all …]
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D | udivdi3.S | 10 movi 0xffffffffffffbaf1,r21 /* .l shift count 17. */ 11 sub r21,r5,r1 36 mshalds.l r1,r21,r1 43 shlri r2,22,r21 44 mulu.l r21,r1,r21 47 shlrd r21,r0,r21 48 mulu.l r21,r3,r5 49 add r8,r21,r8 50 mcmpgt.l r21,r63,r21 // See Note 1 52 mshfhi.l r63,r21,r21 [all …]
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D | udivsi3.S | 17 sub r20,r25,r21 18 mmulfx.w r21,r21,r19 19 mshflo.w r21,r63,r21 24 msub.w r21,r19,r19 31 addi r19,-2,r21 32 mulu.l r4,r21,r18 34 shlli r21,15,r21 37 mmacnfx.wl r25,r19,r21 41 mulu.l r25,r21,r19 50 mulu.l r25,r21,r19
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D | strcpy.S | 36 sub r3, r2, r21 37 addi r21, 8, r20 38 ldx.q r0, r21, r5 88 ldx.q r0, r21, r5
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/arch/csky/abiv2/ |
D | memcmp.S | 31 ldw r21, (r1, 0) 33 cmpne r20, r21 37 ldw r21, (r1, 4) 38 cmpne r20, r21 42 ldw r21, (r1, 8) 43 cmpne r20, r21 47 ldw r21, (r1, 12) 48 cmpne r20, r21 62 ldw r21, (r1, 0) 65 cmpne r20, r21 [all …]
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D | memcpy.S | 43 ldw r21, (r1, 4) 47 stw r21, (r0, 4)
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D | memmove.S | 49 ldw r21, (r1, 4) 53 stw r21, (r0, 4)
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/arch/ia64/lib/ |
D | flush.S | 31 mov r21=1 38 shl r21=r21,r20 // r21: stride size of the i-cache(s) 54 add r24=r21,r24 // we flush "stride size" bytes per iteration 84 mov r21=1 92 shl r21=r21,r20 // r21: stride size of the i-cache(s) 110 add r24=r21,r24 // we flush "stride size" bytes per iteration
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D | ip_fast_csum.S | 45 (p7) ld4 r21=[r15],8 52 add r20=r20,r21 101 ld4 r21=[in1],4 111 add r16=r20,r21
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D | memcpy_mck.S | 43 #define src_pre_l2 r21 175 and r21=-8,tmp 181 add src0=src0,r21 // setting up src pointer 182 add dst0=dst0,r21 // setting up dest pointer 297 shr.u r21=in2,7 // this much cache line 302 cmp.lt p7,p8=1,r21 303 add cnt=-1,r21 365 (p6) or r21=r28,r27 395 EX(.ex_handler, (p6) st8 [dst1]=r21,8) // more than 8 byte to copy 515 shrp r21=r22,r38,shift; /* speculative work */ \ [all …]
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/arch/parisc/kernel/ |
D | relocate_kernel.S | 97 copy %r3, %r21 107 LDREG,ma REG_SZ(%r21), %r8 108 LDREG,ma REG_SZ(%r21), %r9 109 LDREG,ma REG_SZ(%r21), %r10 110 LDREG,ma REG_SZ(%r21), %r11 117 LDREG,ma REG_SZ(%r21), %r8 118 LDREG,ma REG_SZ(%r21), %r9 119 LDREG,ma REG_SZ(%r21), %r10 120 LDREG,ma REG_SZ(%r21), %r11
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D | pacache.S | 67 LDREG ITLB_SID_STRIDE(%r1), %r21 80 add %r21, %r20, %r20 /* increment space */ 103 add %r21, %r20, %r20 /* increment space */ 111 LDREG DTLB_SID_STRIDE(%r1), %r21 124 add %r21, %r20, %r20 /* increment space */ 147 add %r21, %r20, %r20 /* increment space */ 389 ldd 16(%r25), %r21 396 std %r21, 16(%r26) 399 ldd 48(%r25), %r21 406 std %r21, 48(%r26) [all …]
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D | syscall.S | 127 depdi 0, 31, 32, %r21 178 STREG %r21, TASK_PT_GR21(%r1) 205 stw %r21, -56(%r30) /* 6th argument */ 338 LDREG TASK_PT_GR21(%r1), %r21 343 stw %r21, -56(%r30) /* 6th argument */ 494 LDREGX %r20(%sr2,r28), %r21 /* Scratch use of r21 */ 497 be,n 0(%sr2,%r21) 500 ldo -ENOSYS(%r0),%r21 /* set errno */ 593 mfctl %cr27, %r21 /* Get current thread register */ 594 cmpb,<>,n %r21, %r28, cas_lock /* Called recursive? */ [all …]
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D | sys_parisc32.c | 20 int r22, int r21, int r20) in sys32_unimplemented() argument
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/arch/ia64/kernel/ |
D | ivt.S | 123 shl r21=r16,3 // shift bit 60 into sign bit 126 shr.u r22=r21,3 146 (p6) shr.u r21=r21,PGDIR_SHIFT+PAGE_SHIFT 147 (p7) shr.u r21=r21,PGDIR_SHIFT+PAGE_SHIFT-3 151 cmp.eq p7,p6=0,r21 // unused address bits all zeroes? 177 dep r21=r19,r20,3,(PAGE_SHIFT-3) // r21=pte_offset(pmd,addr) 179 (p7) ld8 r18=[r21] // read *pte 226 ld8 r25=[r21] // read *pte again 344 MOV_FROM_IPSR(p0, r21) 359 extr.u r23=r21,IA64_PSR_CPL0_BIT,2 // extract psr.cpl [all …]
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D | fsys.S | 202 add r21 = IA64_CLKSRC_MMIO_OFFSET,r20 219 ld8 r30 = [r21] // clocksource->mmio_ptr 282 mov r21 = r8 301 (p14) shr.u r21 = r2, 4 304 EX(.fail_efault, st8 [r23] = r21) 402 mov r21=ar.fpsr 521 ld8 r21=[r17] // cumulated utime 528 add r21=r21,r18 // sum utime 531 st8 [r17]=r21 // update utime
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D | entry.S | 181 adds r21=IA64_TASK_THREAD_KSP_OFFSET,in0 195 ld8 sp=[r21] // load kernel stack pointer of new task 289 mov r21=b0 303 st8 [r14]=r21,SW(B1)-SW(B0) // save b0 310 mov r21=ar.lc // I-unit 320 st8 [r15]=r21 // save ar.lc 348 mov r21=pr 351 st8 [r3]=r21 // save predicate registers 380 ld8 r21=[r2],16 // restore b0 415 mov b0=r21 [all …]
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/arch/nds32/kernel/ |
D | ex-entry.S | 59 mfsr $r21, $P_IPSW 121 mfsr $r21, $PSW 123 or $r21, $r21, $r20 124 mtsr $r21, $PSW
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/arch/microblaze/lib/ |
D | uaccess_old.S | 110 4: lwi r21, r6, 0x000C + offset; \ 118 12: swi r21, r5, 0x000C + offset; \ 198 swi r21, r1, 20 221 lwi r21, r1, 20 241 lwi r21, r1, 20
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/arch/powerpc/kernel/ |
D | idle_book3s.S | 62 std r21,-8*8(r1) 107 ld r21,-8*8(r1) 164 std r21,-8*8(r1)
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/arch/powerpc/lib/ |
D | memcpy_mcsafe_64.S | 27 ld r21,STK_REG(R21)(r1) 97 std r21,STK_REG(R21)(r1) 122 err2; ld r21,112(r4) 139 err2; std r21,112(r3) 179 ld r21,STK_REG(R21)(r1)
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/arch/arc/include/asm/ |
D | unwind.h | 35 unsigned long r21; member 94 PTREGS_INFO(r21), \
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/arch/alpha/include/uapi/asm/ |
D | ptrace.h | 32 unsigned long r21; member
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