/arch/nios2/include/asm/ |
D | entry.h | 24 rdctl r24, estatus 25 andi r24, r24, ESTATUS_EU 26 beq r24, r0, 1f /* In supervisor mode, already on kernel stack */ 28 movia r24, _current_thread /* Switch to current kernel stack */ 29 ldw r24, 0(r24) /* using the thread_info */ 30 addi r24, r24, THREAD_SIZE-PT_REGS_SIZE 31 stw sp, PT_SP(r24) /* Save user stack before changing */ 32 mov sp, r24 35 1 : mov r24, sp 37 stw r24, PT_SP(sp) [all …]
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/arch/ia64/lib/ |
D | flush.S | 41 shl r24=r23,r20 // r24: addresses for "fc.i" = 53 .Loop: fc.i r24 // issuable on M0 only 54 add r24=r21,r24 // we flush "stride size" bytes per iteration 95 shl r24=r23,r20 // r24: addresses for "fc" = 109 fc r24 // issuable on M0 only 110 add r24=r21,r24 // we flush "stride size" bytes per iteration
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D | ip_fast_csum.S | 51 ld4 r24=[in0] 57 add r20=r20,r24 108 ld4 r24=[in0],4 118 add r18=r24,r25
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/arch/hexagon/kernel/ |
D | head.S | 28 r24.L = #LO(swapper_pg_dir) 29 r24.H = #HI(swapper_pg_dir) 41 r24 = sub(r24,r1); /* swapper_pg_dir - PAGE_OFFSET */ define 42 r24 = add(r24,r25); /* + PHYS_OFFSET */ define 44 r0 = r24; /* aka __pa(swapper_pg_dir) */ 98 r0 = add(r1, r24); /* advance to 0xc0000000 entry */ 113 r0 = r24; 156 r0 = r24
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/arch/nios2/kernel/ |
D | entry.S | 145 rdctl r24, status 147 and r24, r24, r9 148 wrctl status, r24 154 add r24, r9, r5 155 ldw r24, 0(r24) 156 jmp r24 164 ldwio r24, -4(ea) /* instruction that caused the exception */ 165 srli r24, r24, 4 166 andi r24, r24, 0x7c 168 add r24, r24, r9 [all …]
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D | head.S | 82 movia r24, inthandler 83 jmp r24
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/arch/parisc/include/asm/ |
D | unistd.h | 80 #define K_LOAD_ARGS_3(r26,r25,r24) \ argument 81 register unsigned long __r24 __asm__("r24") = (unsigned long)(r24); \ 83 #define K_LOAD_ARGS_4(r26,r25,r24,r23) \ argument 85 K_LOAD_ARGS_3(r26,r25,r24) 86 #define K_LOAD_ARGS_5(r26,r25,r24,r23,r22) \ argument 88 K_LOAD_ARGS_4(r26,r25,r24,r23) 89 #define K_LOAD_ARGS_6(r26,r25,r24,r23,r22,r21) \ argument 91 K_LOAD_ARGS_5(r26,r25,r24,r23,r22)
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D | asmregs.h | 13 arg2: .reg %r24 57 r24: .reg %r24
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/arch/powerpc/kernel/ |
D | head_64.S | 142 mfmsr r24 143 ori r24,r24,MSR_RI 144 mtmsrd r24 /* RI on */ 147 mr r24,r3 154 std r24,(ABS_ADDR(__secondary_hold_acknowledge))(0) 171 mr r3,r24 306 mr r24,r3 317 mr r3,r24 333 mr r24,r3 345 mr r3,r24 [all …]
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D | idle_book3s.S | 65 std r24,-8*11(r1) 110 ld r24,-8*11(r1) 167 std r24,-8*11(r1)
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D | misc_32.S | 712 addi r24, r6, 1 /* r24 will contain 1 or 2 */ 751 tlbwe r3, r24, PPC44x_TLB_PAGEID 752 tlbwe r4, r24, PPC44x_TLB_XLAT 753 tlbwe r5, r24, PPC44x_TLB_ATTRIB 819 tlbwe r3, r24, PPC44x_TLB_PAGEID 846 tlbre r24, r23, 0 /* TLB Word 0 */ 884 insrwi r24, r7, 1, 21 /* Change the TS in the saved TLB word 0 */ 892 tlbwe r24, r3, 0 947 rlwinm r10, r24, 0, 22, 27 982 clrrwi r24, r24, 12 /* Clear the valid bit */ [all …]
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/arch/parisc/kernel/ |
D | syscall.S | 124 depdi 0, 31, 32, %r24 181 STREG %r24, TASK_PT_GR24(%r1) /* 3rd argument */ 335 LDREG TASK_PT_GR24(%r1), %r24 566 depdi 0, 31, 32, %r24 641 2: stw %r24, 0(%r26) 712 depdi 0, 31, 32, %r24 728 5: ldb 0(%r24), %r24 738 7: ldh 0(%r24), %r24 748 9: ldw 0(%r24), %r24 758 11: ldd 0(%r24), %r24 [all …]
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D | sys_parisc32.c | 19 asmlinkage long sys32_unimplemented(int r26, int r25, int r24, int r23, in sys32_unimplemented() argument
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/arch/arc/kernel/ |
D | ctx_sw_asm.S | 35 add2 r24, r0, KSP_WORD_OFF 36 st sp, [r24]
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/arch/microblaze/lib/ |
D | uaccess_old.S | 113 7: lwi r24, r6, 0x0018 + offset; \ 121 15: swi r24, r5, 0x0018 + offset; \ 201 swi r24, r1, 32 224 lwi r24, r1, 32 244 lwi r24, r1, 32
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/arch/ia64/kernel/ |
D | minstate.h | 72 (pUStk) mov.m r24=ar.rnat; \ 119 (pUStk) st8 [r17]=r24,16; /* save ar.rnat */ \ 182 .mem.offset 0,0; st8.spill [r2]=r24,16; \ 196 adds r24=PT(B6)-PT(F7),r3; \ 208 st8 [r24]=r18,16; /* b6 */ \ 211 st8 [r24]=r9; /* ar.csd */ \
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D | ivt.S | 188 ITC_I_AND_D(p10, p11, r18, r24) // insert the instruction TLB entry and 191 MOV_TO_IFA(r22, r24) 194 MOV_TO_ITIR(p8, r25, r24) // change to default page-size for VHPT 202 adds r24=__DIRTY_BITS_NO_ED|_PAGE_PL_0|_PAGE_AR_RW,r23 204 ITC_D(p7, r24, r25) 386 mov r24=PERCPU_ADDR 399 cmp.ge p10,p11=r16,r24 // access to per_cpu_data? 414 MOV_TO_ITIR(p10, r25, r24) 423 MOV_TO_IPSR(p6, r21, r24) 557 mov r24=PAGE_SHIFT<<2 [all …]
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D | relocate_kernel.S | 73 mov r24=r0 79 cmp.ltu p6,p7=r24,r19 89 add r24=1,r24 292 st8 [in0]=r24, 8 // r24
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/arch/nds32/lib/ |
D | copy_template.S | 44 lmw1 $r17, $r1, $r24 46 smw1 $r17, $r0, $r24
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/arch/arc/include/asm/ |
D | unwind.h | 38 unsigned long r24; member 97 PTREGS_INFO(r24), \
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/arch/alpha/include/uapi/asm/ |
D | ptrace.h | 35 unsigned long r24; member
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/arch/arc/include/uapi/asm/ |
D | ptrace.h | 45 unsigned long r25, r24, r23, r22, r21, r20; member
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/arch/hexagon/include/uapi/asm/ |
D | user.h | 38 unsigned long r24; member
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/arch/hexagon/include/asm/ |
D | processor.h | 114 unsigned long r24; member
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/arch/powerpc/crypto/ |
D | aes-spe-regs.h | 30 #define rI0 r24 /* IV */
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