| /arch/microblaze/lib/ |
| D | fastcopy.S | 75 andi r9, r6, 3 /* t1 = s & 3 */
77 bnei r9, a_block_unaligned
80 lwi r9, r6, 0 /* t1 = *(s + 0) */
84 swi r9, r5, 0 /* *(d + 0) = t1 */
88 lwi r9, r6, 16 /* t1 = *(s + 16) */
92 swi r9, r5, 16 /* *(d + 16) = t1 */
107 addi r9, r9, -1
108 beqi r9, a_block_u1 /* t1 was 1 => 1 byte offset */
109 addi r9, r9, -1
110 beqi r9, a_block_u2 /* t1 was 2 => 2 byte offset */
[all …]
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| /arch/arm/crypto/ |
| D | sha1-armv4-large.S | 83 ldrb r9,[r1,#3]
87 orr r9,r9,r10,lsl#8
89 orr r9,r9,r11,lsl#16
91 orr r9,r9,r12,lsl#24
93 ldr r9,[r1],#4 @ handles unaligned
98 rev r9,r9 @ byte swap
102 add r7,r7,r9 @ E+=X[i]
104 str r9,[r14,#-4]!
108 ldrb r9,[r1,#3]
112 orr r9,r9,r10,lsl#8
[all …]
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| /arch/powerpc/kvm/ |
| D | book3s_32_sr.S | 30 #define XCHG_SR(n) lwz r9, (SVCPU_SR+(n*4))(r3); \
31 mtsr n, r9
58 li r9, 0
59 KVM_KILL_BAT(0, r9)
60 KVM_KILL_BAT(1, r9)
61 KVM_KILL_BAT(2, r9)
62 KVM_KILL_BAT(3, r9)
102 lis r9, BATS@ha
103 addi r9, r9, BATS@l
104 tophys(r9, r9)
[all …]
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| D | book3s_hv_rmhandlers.S | 588 ld r9, VCORE_KVM(r5) /* pointer to struct kvm */
611 lwz r7,KVM_LPID(r9)
613 ld r6,KVM_SDR1(r9)
623 mr r3, r9 /* kvm pointer */
938 ld r9,VCPU_SLB_V(r6)
939 slbmte r9,r8
947 li r9, TM_QW1_OS
959 stdx r11,r9,r10
966 stdcix r11,r9,r10
968 3: li r9, 1
[all …]
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| D | book3s_segment.S | 90 ld r9, SVCPU_SHADOW_FSCR(r13)
91 mtspr SPRN_FSCR, r9
116 PPC_LL r9, SVCPU_LR(r3)
121 mtlr r9
126 PPC_LL r9, SVCPU_PC(r3)
143 mtsrr0 r9
148 PPC_LL r9, SVCPU_R9(r3)
175 std r9, HSTATE_SCRATCH2(r13)
176 ld r9, HSTATE_SCRATCH1(r13)
177 mtctr r9
[all …]
|
| D | tm.S | 36 mr r9, r3
95 std r9, PACATMSCRATCH(r13)
96 ld r9, HSTATE_SCRATCH1(r13)
99 std r0, VCPU_GPRS_TM(0)(r9)
104 std r1, VCPU_GPRS_TM(1)(r9)
108 std r2, VCPU_GPRS_TM(2)(r9)
119 std reg, VCPU_GPRS_TM(reg)(r9)
125 std r4, VCPU_GPRS_TM(13)(r9)
128 std r4, VCPU_GPRS_TM(9)(r9)
133 stw r6, VCPU_CR_TM(r9)
[all …]
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| /arch/powerpc/boot/ |
| D | crt0.S | 72 li r9,0
79 lwz r9,4(r12) /* get RELA pointer in r9 */
96 cmpwi r9,0
99 add r9,r9,r11 /* Relocate RELA pointer */
101 2: lbz r0,4+3(r9) /* ELF32_R_INFO(reloc->r_info) */
104 lwz r12,0(r9) /* reloc->r_offset */
105 lwz r0,8(r9) /* reloc->r_addend */
108 addi r9,r9,12
112 3: lwz r9,p_start-p_base(r10) /* note: these are relocated now */
114 4: dcbf r0,r9
[all …]
|
| D | virtex405-head.S | 22 mfdccr r9
23 cmplwi r9,0
25 lis r9,0
28 1: dccci r0,r9
29 addi r9,r9,0x20
|
| /arch/arc/include/asm/ |
| D | entry-compact.h | 52 bbit1 r9, STATUS_U_BIT, 88f
93 GET_CURR_TASK_ON_CPU r9
96 GET_TSK_STACK_BASE r9, r9
99 st sp, [r9, PT_sp - SZ_PT_REGS]
102 mov sp, r9
114 lr r9, [status32]
115 bclr r9, r9, STATUS_AE_BIT
116 or r9, r9, (STATUS_E1_MASK|STATUS_E2_MASK)
117 sr r9, [erstatus]
118 mov r9, 55f
[all …]
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| /arch/powerpc/lib/ |
| D | memcpy_64.S | 32 addi r9,r3,-1
37 stbu r10,1(r9)
67 ld r9,0(r4)
74 mr r8,r9
76 1: ld r9,8(r4)
79 stdu r9,16(r3)
86 lwz r9,8(r4)
88 stw r9,0(r3)
91 lhz r9,8(r4)
93 sth r9,0(r3)
[all …]
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| D | strlen_32.S | 54 1: lwzu r9, 4(r10)
55 2: subf r8, r7, r9
58 andc. r8, r8, r9
60 andc r8, r9, r6
61 orc r9, r9, r6
63 nor r8, r8, r9
73 lwzu r9, 4(r10)
76 orc r9, r9, r8
|
| D | copyuser_64.S | 104 mr r9,r7
111 stex; std r9,0(r3)
116 lex; ld r9,0(r4)
125 stex; std r9,0(r3)
136 lex; ld r9,0(r4)
138 stex; std r9,0(r3)
141 lex; lwz r9,0(r4)
143 stex; stw r9,0(r3)
146 lex; lhz r9,0(r4)
148 stex; sth r9,0(r3)
[all …]
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| D | copypage_64.S | 30 li r9,0
35 dcbt r9,r4
36 dcbz r9,r3
37 add r9,r9,r12
52 ld r9,8(r4)
58 std r9,40(r3)
68 ld r9,72(r4)
74 std r9,104(r3)
86 ld r9,8(r4)
92 std r9,40(r3)
[all …]
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| D | div64.S | 32 addc r9,r4,r10 # rounding up (so the estimate cannot
34 andc r9,r9,r10
35 addze r9,r9
37 rotlw r9,r9,r0
39 divwu r11,r11,r9 # then we divide the shifted quantities
41 mulhwu r9,r11,r4 # multiply the estimate by the divisor,
44 subfe. r5,r9,r5 # quotient
|
| /arch/arm/mm/ |
| D | abort-lv4t.S | 55 ldr r9, [sp], #4
64 str r9, [sp, #-4]!
68 and r9, r8, r7, lsl #1
69 add r6, r6, r9, lsr #1
70 and r9, r8, r7, lsl #2
71 add r6, r6, r9, lsr #2
72 and r9, r8, r7, lsl #3
73 add r6, r6, r9, lsr #3
77 and r9, r8, #15 << 16 @ Extract 'n' from instruction
78 ldr r7, [r2, r9, lsr #14] @ Get register 'Rn'
[all …]
|
| /arch/s390/kernel/ |
| D | base.S | 16 GEN_BR_THUNK %r9
24 lg %r9,0(%r1)
25 ltgr %r9,%r9
27 BASR_EX %r14,%r9
45 lg %r9,0(%r1)
46 ltgr %r9,%r9
48 BASR_EX %r14,%r9
|
| /arch/powerpc/kernel/ |
| D | head_40x.S | 122 stw r9,GPR9(r11); \
127 mfspr r9,SPRN_ESR; /* in them at the point where the */\
128 stw r9,_ESR(r11); /* exception was taken */\
131 mfspr r9,SPRN_SRR3; \
134 rlwinm r9,r9,0,14,12; /* clear MSR_WE (necessary?) */\
187 stw r9, 4(r0)
194 mtspr SPRN_SPRG_SCRATCH4, r9
219 li r9, 0
220 mtspr SPRN_PID, r9 /* TLB will have 0 TID */
238 andi. r9, r11, _PAGE_RW /* Is it writeable? */
[all …]
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| D | reloc_32.S | 39 lwz r9, (p_rela - 0b)(r12)
40 add r9, r9, r12 /* runtime address of .rela.dyn section */
89 subf r7, r7, r9 /* cur_offset */
105 lwz r4, 4(r9) /* r4 = rela.r_info */
132 lwz r4, 0(r9) /* r_offset */
133 lwz r0, 8(r9) /* r_addend */
142 lwz r4, 0(r9) /* r_offset */
143 lwz r0, 8(r9) /* r_addend */
153 lwz r4, 0(r9) /* r_offset */
154 lwz r0, 8(r9) /* r_addend */
[all …]
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| D | entry_32.S | 136 stw r9,_MSR(r11)
137 andi. r2,r9,MSR_PR
166 lwz r9,TASK_CPU(r2)
167 slwi r9,r9,3
168 add r11,r11,r9
182 kuap_save_and_lock r11, r12, r9, r2, r0
184 lwz r9,KSP_LIMIT(r12)
185 cmplw r1,r9 /* if r1 <= ksp_limit */
197 mflr r9
199 lwz r11,0(r9) /* virtual address of handler */
[all …]
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| D | fsl_booke_entry_mapping.S | 46 mfspr r9,SPRN_TLB1CFG
47 andi. r9,r9,0xfff
61 cmpw r6,r9 /* Are we done? */
96 subfic r9,r6,-4096
97 and r9,r9,r7
99 or r25,r8,r9
121 1: mflr r9
122 rlwimi r7,r9,0,20,31
152 li r9,0x0c
153 tlbivax 0,r9
[all …]
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| D | reloc_64.S | 24 ld r9,(p_rela - 0b)(r12)
25 add r9,r9,r12 /* r9 has runtime addr of .rela.dyn section */
59 subf r7,r7,r9 /* cur_offset */
71 ld r6,0(r9) /* reloc->r_offset */
72 ld r0,16(r9) /* reloc->r_addend */
75 addi r9,r9,24
|
| D | idle_6xx.S | 153 lwz r9,_LINK(r11) /* interrupted in ppc6xx_idle: */
154 stw r9,_NIP(r11) /* make it do a blr */
166 mfspr r9,SPRN_HID0
167 andis. r9,r9,HID0_NAP@h
169 addis r9,r11,(nap_save_msscr0-KERNELBASE)@ha
170 lwz r9,nap_save_msscr0@l(r9)
171 mtspr SPRN_MSSCR0, r9
177 addis r9,r11,(nap_save_hid1-KERNELBASE)@ha
178 lwz r9,nap_save_hid1@l(r9)
179 mtspr SPRN_HID1, r9
|
| /arch/powerpc/kernel/vdso32/ |
| D | gettimeofday.S | 39 mr r9, r3 /* datapage ptr in r9 */
50 lwz r4,CFG_TZ_MINUTEWEST(r9)/* fill tz */
51 lwz r5,CFG_TZ_DSTTIME(r9)
80 mr r9,r3 /* datapage ptr in r9 */
97 lwz r5,(WTOM_CLOCK_SEC+LOPART)(r9)
98 lwz r6,WTOM_CLOCK_NSEC(r9)
105 add r9,r9,r0
106 lwz r0,(CFG_TB_UPDATE_COUNT+LOPART)(r9)
196 mr r9, r3 /* datapage ptr in r9 */
198 lwz r3,STAMP_XTIME+TSPEC_TV_SEC(r9)
[all …]
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| /arch/arm/mach-s3c24xx/ |
| D | sleep-s3c2412.S | 46 ldrne r9, [r1]
47 strne r9, [r1]
48 ldrne r9, [r2]
49 strne r9, [r2]
50 ldrne r9, [r3]
51 strne r9, [r3]
|
| /arch/sh/kernel/ |
| D | relocate_kernel.S | 31 mov.l r9, @-r15
44 mov.l 12f, r9
46 or r9, r8
58 mov.l 12f, r9
59 not r9, r9
61 and r9, r8
90 mov.l 12f, r9
91 not r9, r9
93 and r9, r8
105 mov.l 12f, r9
[all …]
|