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Searched refs:read_cr2 (Results 1 – 15 of 15) sorted by relevance

/arch/x86/entry/
Dentry_64.S869 .macro idtentry_part do_sym, has_error_code:req, read_cr2:req, paranoid:req, shift_ist=-1, ist_offs…
879 .if \read_cr2
914 .if \read_cr2
971 …idtentry sym do_sym has_error_code:req paranoid=0 shift_ist=-1 ist_offset=0 create_gap=0 read_cr2=0
1009 idtentry_part \do_sym, \has_error_code, \read_cr2, \paranoid, \shift_ist, \ist_offset
1018 idtentry_part \do_sym, \has_error_code, \read_cr2, paranoid=0
1030 idtentry double_fault do_double_fault has_error_code=1 paranoid=2 read_cr2=1
1202 idtentry page_fault do_page_fault has_error_code=1 read_cr2=1
1205 idtentry async_page_fault do_async_page_fault has_error_code=1 read_cr2=1
/arch/x86/include/asm/
Dspecial_insns.h153 static inline unsigned long read_cr2(void) in read_cr2() function
Dparavirt.h117 static inline unsigned long read_cr2(void) in read_cr2() function
119 return PVOP_CALLEE0(unsigned long, mmu.read_cr2); in read_cr2()
Dparavirt_types.h218 struct paravirt_callee_save read_cr2; member
/arch/x86/kernel/
Dasm-offsets.c72 OFFSET(PV_MMU_read_cr2, paravirt_patch_template, mmu.read_cr2); in common()
Dparavirt_patch.c97 PATCH_CASE(mmu, read_cr2, xxl, insn_buff, len); in native_patch()
Dnmi.c523 this_cpu_write(nmi_cr2, read_cr2()); in do_nmi()
555 if (unlikely(this_cpu_read(nmi_cr2) != read_cr2())) in do_nmi()
Dprocess_32.c85 cr2 = read_cr2(); in __show_regs()
Dparavirt.c369 .mmu.read_cr2 = __PV_IS_CALLEE_SAVE(native_read_cr2),
Dprocess_64.c113 cr2 = read_cr2(); in __show_regs()
/arch/x86/mm/
Dextable.c275 regs->orig_ax, read_cr2()); in early_fixup_exception()
/arch/x86/power/
Dcpu.c123 ctxt->cr2 = read_cr2(); in __save_processor_state()
/arch/x86/xen/
Denlighten_pv.c999 pv_ops.mmu.read_cr2 = in xen_setup_vcpu_info_placement()
Dmmu_pv.c2390 .read_cr2 = __PV_IS_CALLEE_SAVE(xen_read_cr2),
/arch/x86/kvm/vmx/
Dvmx.c6579 if (vcpu->arch.cr2 != read_cr2()) in vmx_vcpu_run()
6585 vcpu->arch.cr2 = read_cr2(); in vmx_vcpu_run()