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Searched refs:rm (Results 1 – 25 of 78) sorted by relevance

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/arch/arm/net/
Dbpf_jit_32.h159 #define _AL3_R(op, rd, rn, rm) ((op ## _R) | (rd) << 12 | (rn) << 16 | (rm)) argument
165 #define ARM_ADD_R(rd, rn, rm) _AL3_R(ARM_INST_ADD, rd, rn, rm) argument
166 #define ARM_ADDS_R(rd, rn, rm) _AL3_R(ARM_INST_ADDS, rd, rn, rm) argument
169 #define ARM_ADC_R(rd, rn, rm) _AL3_R(ARM_INST_ADC, rd, rn, rm) argument
172 #define ARM_AND_R(rd, rn, rm) _AL3_R(ARM_INST_AND, rd, rn, rm) argument
173 #define ARM_ANDS_R(rd, rn, rm) _AL3_R(ARM_INST_ANDS, rd, rn, rm) argument
176 #define ARM_BIC_R(rd, rn, rm) _AL3_R(ARM_INST_BIC, rd, rn, rm) argument
180 #define ARM_BX(rm) (ARM_INST_BX | (rm)) argument
181 #define ARM_BLX_R(rm) (ARM_INST_BLX_R | (rm)) argument
183 #define ARM_CMP_R(rn, rm) _AL3_R(ARM_INST_CMP, 0, rn, rm) argument
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/arch/x86/math-emu/
Dreg_divide.c28 int FPU_div(int flags, int rm, int control_w) in FPU_div() argument
37 deststnr = rm; in FPU_div()
46 a = (FPU_REG *) rm; in FPU_div()
49 a = &st(rm); in FPU_div()
51 taga = FPU_gettagi(rm); in FPU_div()
58 b = (FPU_REG *) rm; in FPU_div()
61 b = &st(rm); in FPU_div()
63 tagb = FPU_gettagi(rm); in FPU_div()
133 return real_2op_NaN((FPU_REG *) rm, flags & 0x0f, 0, in FPU_div()
141 return real_2op_NaN(st0_ptr, tag, rm, in FPU_div()
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Dget_address.c214 unsigned rm = FPU_modrm & 7; in FPU_get_address() local
229 if (rm == 4 && mod != 3) { in FPU_get_address()
232 cpu_reg_ptr = &REG_(rm); in FPU_get_address()
235 if (rm == 5) { in FPU_get_address()
299 unsigned rm = FPU_modrm & 7; in FPU_get_address_16() local
315 if (rm == 6) { in FPU_get_address_16()
347 switch (rm) { in FPU_get_address_16()
/arch/mips/math-emu/
Ddp_simple.c22 oldrm = ieee754_csr.rm; in ieee754dp_neg()
23 ieee754_csr.rm = FPU_CSR_RD; in ieee754dp_neg()
25 ieee754_csr.rm = oldrm; in ieee754dp_neg()
40 oldrm = ieee754_csr.rm; in ieee754dp_abs()
41 ieee754_csr.rm = FPU_CSR_RD; in ieee754dp_abs()
46 ieee754_csr.rm = oldrm; in ieee754dp_abs()
Dsp_simple.c22 oldrm = ieee754_csr.rm; in ieee754sp_neg()
23 ieee754_csr.rm = FPU_CSR_RD; in ieee754sp_neg()
25 ieee754_csr.rm = oldrm; in ieee754sp_neg()
40 oldrm = ieee754_csr.rm; in ieee754sp_abs()
41 ieee754_csr.rm = FPU_CSR_RD; in ieee754sp_abs()
46 ieee754_csr.rm = oldrm; in ieee754sp_abs()
Dsp_mul.c16 unsigned int rm; in ieee754sp_mul() local
139 rm = hrm | (lrm != 0); in ieee754sp_mul()
144 if ((int) rm < 0) { in ieee754sp_mul()
145 rm = (rm >> (32 - (SP_FBITS + 1 + 3))) | in ieee754sp_mul()
146 ((rm << (SP_FBITS + 1 + 3)) != 0); in ieee754sp_mul()
149 rm = (rm >> (32 - (SP_FBITS + 1 + 3 + 1))) | in ieee754sp_mul()
150 ((rm << (SP_FBITS + 1 + 3 + 1)) != 0); in ieee754sp_mul()
152 assert(rm & (SP_HIDDEN_BIT << 3)); in ieee754sp_mul()
154 return ieee754sp_format(rs, re, rm); in ieee754sp_mul()
Ddp_mul.c16 u64 rm; in ieee754dp_mul() local
144 rm = hrm | (lrm != 0); in ieee754dp_mul()
149 if ((s64) rm < 0) { in ieee754dp_mul()
150 rm = (rm >> (64 - (DP_FBITS + 1 + 3))) | in ieee754dp_mul()
151 ((rm << (DP_FBITS + 1 + 3)) != 0); in ieee754dp_mul()
154 rm = (rm >> (64 - (DP_FBITS + 1 + 3 + 1))) | in ieee754dp_mul()
155 ((rm << (DP_FBITS + 1 + 3 + 1)) != 0); in ieee754dp_mul()
157 assert(rm & (DP_HIDDEN_BIT << 3)); in ieee754dp_mul()
159 return ieee754dp_format(rs, re, rm); in ieee754dp_mul()
Dsp_div.c14 unsigned int rm; in ieee754sp_div() local
116 rm = 0; in ieee754sp_div()
122 rm |= bm; in ieee754sp_div()
129 rm <<= 1; in ieee754sp_div()
131 rm |= 1; /* have remainder, set sticky */ in ieee754sp_div()
133 assert(rm); in ieee754sp_div()
137 while ((rm >> (SP_FBITS + 3)) == 0) { in ieee754sp_div()
138 rm <<= 1; in ieee754sp_div()
142 return ieee754sp_format(xs == ys ? 0 : 1, re, rm); in ieee754sp_div()
Ddp_div.c14 u64 rm; in ieee754dp_div() local
116 rm = 0; in ieee754dp_div()
122 rm |= bm; in ieee754dp_div()
129 rm <<= 1; in ieee754dp_div()
131 rm |= 1; /* have remainder, set sticky */ in ieee754dp_div()
133 assert(rm); in ieee754dp_div()
138 while ((rm >> (DP_FBITS + 3)) == 0) { in ieee754dp_div()
139 rm <<= 1; in ieee754dp_div()
143 return ieee754dp_format(xs == ys ? 0 : 1, re, rm); in ieee754dp_div()
Dsp_fdp.c22 u32 rm; in ieee754sp_fdp() local
58 if ((ieee754_csr.rm == FPU_CSR_RU && !xs) || in ieee754sp_fdp()
59 (ieee754_csr.rm == FPU_CSR_RD && xs)) in ieee754sp_fdp()
70 rm = (xm >> (DP_FBITS - (SP_FBITS + 3))) | in ieee754sp_fdp()
73 return ieee754sp_format(xs, xe, rm); in ieee754sp_fdp()
Dsp_maddf.c20 unsigned int rm; in _sp_maddf() local
119 return ieee754sp_zero(ieee754_csr.rm == FPU_CSR_RD); in _sp_maddf()
185 rm = XSPSRS64(rm64, (62 - 26)); in _sp_maddf()
186 return ieee754sp_format(rs, re, rm); in _sp_maddf()
231 return ieee754sp_zero(ieee754_csr.rm == FPU_CSR_RD); in _sp_maddf()
Ddp_sqrt.c70 ieee754_csr.rm = FPU_CSR_RN; in ieee754dp_sqrt()
114 ieee754_csr.rm = FPU_CSR_RZ; in ieee754dp_sqrt()
130 switch (oldcsr.rm) { in ieee754dp_sqrt()
Dieee754dp.c61 switch (ieee754_csr.rm) { in ieee754dp_get_rounding()
102 switch(ieee754_csr.rm) { in ieee754dp_format()
166 switch (ieee754_csr.rm) { in ieee754dp_format()
Dieee754sp.c61 switch (ieee754_csr.rm) { in ieee754sp_get_rounding()
102 switch(ieee754_csr.rm) { in ieee754sp_format()
165 switch (ieee754_csr.rm) { in ieee754sp_format()
Dieee754.h151 __BITFIELD_FIELD(unsigned rm:2, /* current rounding mode */
158 return (ieee754_csr.rm); in ieee754_getrm()
161 static inline unsigned int ieee754_setrm(unsigned int rm) in ieee754_setrm() argument
163 return (ieee754_csr.rm = rm); in ieee754_setrm()
/arch/x86/realmode/
DMakefile12 subdir- := rm
17 $(obj)/rmpiggy.o: $(obj)/rm/realmode.bin
19 $(obj)/rm/realmode.bin: FORCE
20 $(Q)$(MAKE) $(build)=$(obj)/rm $@
/arch/arm/probes/kprobes/
Dactions-arm.c75 int rm = insn & 0xf; in emulate_ldrdstrd() local
81 register unsigned long rmv asm("r3") = regs->uregs[rm]; in emulate_ldrdstrd()
104 int rm = insn & 0xf; in emulate_ldr() local
109 register unsigned long rmv asm("r3") = regs->uregs[rm]; in emulate_ldr()
135 int rm = insn & 0xf; in emulate_str() local
141 register unsigned long rmv asm("r3") = regs->uregs[rm]; in emulate_str()
161 int rm = insn & 0xf; in emulate_rd12rn16rm0rs8_rwflags() local
167 register unsigned long rmv asm("r3") = (rm == 15) ? pc in emulate_rd12rn16rm0rs8_rwflags()
168 : regs->uregs[rm]; in emulate_rd12rn16rm0rs8_rwflags()
195 int rm = insn & 0xf; in emulate_rd12rn16rm0_rwflags_nopc() local
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Dactions-thumb.c29 int rm = insn & 0xf; in t32_simulate_table_branch() local
32 unsigned long rmv = regs->uregs[rm]; in t32_simulate_table_branch()
190 int rm = insn & 0xf; in t32_emulate_ldrstr() local
194 register unsigned long rmv asm("r3") = regs->uregs[rm]; in t32_emulate_ldrstr()
216 int rm = insn & 0xf; in t32_emulate_rd8rn16rm0_rwflags() local
220 register unsigned long rmv asm("r3") = regs->uregs[rm]; in t32_emulate_rd8rn16rm0_rwflags()
285 int rm = insn & 0xf; in t32_emulate_rdlo12rdhi8rn16rm0_noflags() local
290 register unsigned long rmv asm("r3") = regs->uregs[rm]; in t32_emulate_rdlo12rdhi8rn16rm0_noflags()
310 int rm = (insn >> 3) & 0xf; in t16_simulate_bxblx() local
311 unsigned long rmv = (rm == 15) ? pc : regs->uregs[rm]; in t16_simulate_bxblx()
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/arch/arm64/crypto/
Dsm3-ce-core.S15 .macro sm3partw1, rd, rn, rm argument
16 .inst 0xce60c000 | .L\rd | (.L\rn << 5) | (.L\rm << 16)
19 .macro sm3partw2, rd, rn, rm argument
20 .inst 0xce60c400 | .L\rd | (.L\rn << 5) | (.L\rm << 16)
23 .macro sm3ss1, rd, rn, rm, ra
24 .inst 0xce400000 | .L\rd | (.L\rn << 5) | (.L\ra << 10) | (.L\rm << 16)
27 .macro sm3tt1a, rd, rn, rm, imm2
28 .inst 0xce408000 | .L\rd | (.L\rn << 5) | ((\imm2) << 12) | (.L\rm << 16)
31 .macro sm3tt1b, rd, rn, rm, imm2
32 .inst 0xce408400 | .L\rd | (.L\rn << 5) | ((\imm2) << 12) | (.L\rm << 16)
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Dsha512-ce-core.S20 .macro sha512h, rd, rn, rm argument
21 .inst 0xce608000 | .L\rd | (.L\rn << 5) | (.L\rm << 16)
24 .macro sha512h2, rd, rn, rm argument
25 .inst 0xce608400 | .L\rd | (.L\rn << 5) | (.L\rm << 16)
32 .macro sha512su1, rd, rn, rm argument
33 .inst 0xce608800 | .L\rd | (.L\rn << 5) | (.L\rm << 16)
Dsha3-ce-core.S23 .macro eor3, rd, rn, rm, ra
24 .inst 0xce000000 | .L\rd | (.L\rn << 5) | (.L\ra << 10) | (.L\rm << 16)
27 .macro rax1, rd, rn, rm argument
28 .inst 0xce608c00 | .L\rd | (.L\rn << 5) | (.L\rm << 16)
31 .macro bcax, rd, rn, rm, ra
32 .inst 0xce200000 | .L\rd | (.L\rn << 5) | (.L\ra << 10) | (.L\rm << 16)
35 .macro xar, rd, rn, rm, imm6
36 .inst 0xce800000 | .L\rd | (.L\rn << 5) | ((\imm6) << 10) | (.L\rm << 16)
/arch/sh/kernel/
Dtraps_32.c89 unsigned long *rm, *rn; in handle_unaligned_ins() local
97 rm = &regs->regs[index]; in handle_unaligned_ins()
113 srcu = (unsigned char __user *)*rm; in handle_unaligned_ins()
127 src = (unsigned char *)rm; in handle_unaligned_ins()
141 src = (unsigned char*) rm; in handle_unaligned_ins()
153 src = (unsigned char*) rm; in handle_unaligned_ins()
164 srcu = (unsigned char __user *)*rm; in handle_unaligned_ins()
175 srcu = (unsigned char __user *)*rm; in handle_unaligned_ins()
177 *rm += count; in handle_unaligned_ins()
197 dstu = (unsigned char __user *)*rm; /* called Rn in the spec */ in handle_unaligned_ins()
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/arch/powerpc/platforms/ps3/
Dmm.c101 struct mem_region rm; member
110 DBG("%s:%d: map.rm.size = %llxh\n", func, line, m->rm.size); in _debug_dump_map()
128 return (phys_addr < map.rm.size || phys_addr >= map.total) in ps3_mm_phys_to_lpar()
230 r->offset = r->base - map.rm.size; in ps3_mm_get_repository_highmem()
282 if (result || r->base < map.rm.size) { in ps3_mm_region_create()
289 r->offset = r->base - map.rm.size; in ps3_mm_region_create()
318 map.total = map.rm.size; in ps3_mm_region_destroy()
336 if (lpar_addr >= map.rm.size) in dma_sb_lpar_to_bus()
984 if (r->offset < map.rm.size) { in dma_sb_region_create_linear()
986 virt_addr = map.rm.base + r->offset; in dma_sb_region_create_linear()
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/arch/ia64/scripts/
Dtoolchain-flags19 rm -f $out
34 rm -f $out
43 rm -f $out
49 rm -f $out
/arch/powerpc/boot/
Dwrapper409 rm -f $vmz.$$
442 rm -f "$ofile"
446 rm -f "$vmz"
451 rm -f "$ofile"
463 rm -f "$real_rd"
466 rm -f "$vmz"
480 rm -f "$vmz"
490 rm $dtb
505 rm $tmp
535 rm -f "$ofile.elf"
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