Searched refs:we (Results 1 – 25 of 342) sorted by relevance
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| /arch/arc/plat-eznps/ |
| D | entry.S | 38 ; First thing we invalidate D$
45 ; We do not use physical cpuid since we want ids to be continious when
53 ; r3 is used since we use short instruction and we need q-class reg
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| /arch/powerpc/boot/dts/ |
| D | ps3.dts | 22 * so we'll put a null entry here.
34 * we'll put a null entries here. These will be initialized after
39 * here so we can bring up both of ours. See smp_setup_cpu_maps().
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| /arch/x86/ras/ |
| D | Kconfig | 8 PFN overflows, we try to soft-offline that page as we take it to mean
10 be best if we don't use it anymore.
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| /arch/x86/kernel/acpi/ |
| D | wakeup_32.S | 23 # reload the gdt, as we need the full 32 bit address
39 # jump to place where we left off
82 # In case of S3 failure, we'll emerge here. Jump
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| /arch/arm/boot/dts/ |
| D | omap3430-sdp.dts | 71 gpmc,we-on-ns = <54>;
72 gpmc,we-off-ns = <168>;
121 gpmc,we-on-ns = <6>;
122 gpmc,we-off-ns = <30>;
167 gpmc,we-on-ns = <0>;
168 gpmc,we-off-ns = <42>;
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| D | omap2420-h4.dts | 39 gpmc,we-on-ns = <60>;
40 gpmc,we-off-ns = <120>;
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| D | omap3-overo-tobiduo-common.dtsi | 34 gpmc,we-on-ns = <0>;
35 gpmc,we-off-ns = <36>;
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| D | omap2430-sdp.dts | 56 gpmc,we-on-ns = <66>;
57 gpmc,we-off-ns = <169>;
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| D | omap-gpmc-smsc9221.dtsi | 41 gpmc,we-on-ns = <0>;
42 gpmc,we-off-ns = <36>;
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| D | berlin2cd-google-chromecast.dts | 30 * data from the ATAG, so we can't specify the proper range
32 * first by the OF driver, so we can (ab)use it instead.
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| D | omap-gpmc-smsc911x.dtsi | 38 gpmc,we-on-ns = <45>;
39 gpmc,we-off-ns = <140>;
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| /arch/x86/lib/ |
| D | cmpxchg16b_emu.S | 19 # Emulate 'cmpxchg16b %gs:(%rsi)' except we return the result in %al not
22 # Note that this is only useful for a cpuops operation. Meaning that we
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| D | cmpxchg8b_emu.S | 19 # Emulate 'cmpxchg8b (%esi)' on UP except we don't
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| /arch/arm/lib/ |
| D | div64.S | 54 @ See if we need to handle upper 32-bit result.
93 @ See if we need to handle lower 32-bit result.
101 @ Here we shift remainer bits leftwards rather than moving the
116 @ Otherwise, if lower part is also null then we are done.
125 clz xh, xl @ we know xh is zero here so...
141 @ If no bit position left then we are done.
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| /arch/xtensa/lib/ |
| D | strnlen_user.S | 50 addi a4, a2, -4 # because we overincrement at the end;
51 # we compensate with load offsets of 4
93 # Actually, we don't need to check. Zero or nonzero, we'll add one.
94 # Do not add an extra one for the NULL terminator since we have
101 # NOTE that in several places below, we point to the byte just after
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| /arch/c6x/lib/ |
| D | divremu.S | 10 ;; We use a series of up to 31 subc instructions. First, we find
13 ;; to the, and the number of times we have to execute subc.
15 ;; At the end, we have both the remainder and most of the quotient
32 ;; The loop performs a maximum of 28 steps, so we do the
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| D | divu.S | 27 ;; We use a series of up to 31 subc instructions. First, we find
30 ;; to the, and the number of times we have to execute subc.
32 ;; At the end, we have both the remainder and most of the quotient
44 ;; The loop performs a maximum of 28 steps, so we do the
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| /arch/arm/vfp/ |
| D | vfphw.S | 102 @ On UP, we lazily save the VFP context. As a different
107 @ exceptions, so we can get at the
128 @ For SMP, if this thread does not own the hw context, then we
130 @ we always save the state when we switch away from a thread.
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| /arch/arm/kvm/hyp/ |
| D | vfp.S | 18 @ Make sure *really* VFP is enabled so we can touch the registers.
29 @ we only need to save them if FPEXC_EX is set.
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| /arch/alpha/kernel/ |
| D | head.S | 62 # masking, and we cannot duplicate the effort without causing problems
89 # Putting it here means we dont have to recompile the whole
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| /arch/arm/boot/compressed/ |
| D | head-sa1100.S | 24 @ UNTIL we've something like an open bootldr
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| /arch/arm64/boot/dts/rockchip/ |
| D | rk3399-gru.dtsi | 31 * view, though, we won't create a full fixed regulator. We'll just
295 * When we go into S3 ARM Trusted Firmware will transition our PWM regulators
297 * voltage we get when we set the PWM pins to "input").
302 * To make extra certain that we don't hit this OVP at suspend time, we'll
304 * there will not be a big jump. Technically we only need to get within 200 mV
305 * of the default voltage, but the speed here should be fast enough and we need
512 * hooked to ground. Because we specified "cd-gpios" below dw_mmc
655 * At the moment settings are identical for S0 and S3, but if we later
656 * need to configure things differently for S3 we'll adjust here.
726 * Since our pcie doesn't support ClockPM(CPM), we want
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| /arch/alpha/lib/ |
| D | ev6-clear_user.S | 58 # Note - we never actually use $2, so this is a moot computation
59 # and we can rewrite this later...
86 subq $1, 16, $4 # .. .. .. E : If < 16, we can not use the huge loop
198 # so we will use $0 as the loop counter
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| D | memchr.S | 45 # search til the end of the address space, we will overflow
46 # below when we find the address of the last byte. Given
47 # that we will never have a 56-bit address space, cropping
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| /arch/arm/mach-zynq/ |
| D | headsmp.S | 13 ARM_BE8(setend be) @ ensure we are in BE8 mode
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