| /drivers/pinctrl/aspeed/ |
| D | pinctrl-aspeed-g5.c | 584 #define A15 71 macro
592 SIG_EXPR_LIST_ALIAS(A15, SPI1MISO, SPI1);
593 SIG_EXPR_LIST_DECL_SINGLE(A15, VBMISO, VGABIOSROM, COND1, VB_DESC);
594 PIN_DECL_2(A15, GPIOI7, SPI1MISO, VBMISO);
596 FUNC_GROUP_DECL(SPI1, B15, C15, A14, A15);
597 FUNC_GROUP_DECL(SPI1DEBUG, C18, E15, B16, C16, B15, C15, A14, A15);
598 FUNC_GROUP_DECL(SPI1PASSTHRU, C18, E15, B16, C16, B15, C15, A14, A15);
599 FUNC_GROUP_DECL(VGABIOSROM, B15, C15, A14, A15);
1908 ASPEED_PINCTRL_PIN(A15),
2527 { PIN_CONFIG_BIAS_PULL_DOWN, { C18, A15 }, SCU8C, 24 },
[all …]
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| D | pinctrl-aspeed-g6.c | 549 #define A15 71 macro
550 SIG_EXPR_LIST_DECL_SESG(A15, BMCINT, BMCINT, SIG_DESC_SET(SCU418, 7));
551 SIG_EXPR_LIST_DECL_SESG(A15, SIOSCI, SIOSCI, SIG_DESC_SET(SCU4B8, 7));
552 PIN_DECL_2(A15, GPIOI7, BMCINT, SIOSCI);
553 FUNC_GROUP_DECL(BMCINT, A15);
554 FUNC_GROUP_DECL(SIOSCI, A15);
1544 ASPEED_PINCTRL_PIN(A15),
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| D | pinctrl-aspeed-g4.c | 334 #define A15 35 macro
335 SIG_EXPR_LIST_DECL_SINGLE(A15, NRI3, NRI3, SIG_DESC_SET(SCU80, 19));
338 SIG_EXPR_LIST_DECL_DUAL(A15, GPIE2OUT, GPIE2, GPIE);
339 PIN_DECL_2(A15, GPIOE3, NRI3, GPIE2OUT);
341 FUNC_GROUP_DECL(NRI3, A15);
342 FUNC_GROUP_DECL(GPIE2, B15, A15);
1914 ASPEED_PINCTRL_PIN(A15),
2539 { PIN_CONFIG_INPUT_DEBOUNCE, { B15, A15 }, SCUA8, 25 },
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| /drivers/soc/tegra/ |
| D | Kconfig | 73 Tegra124's "4+1" Cortex-A15 CPU complex.
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| /drivers/pinctrl/sh-pfc/ |
| D | pfc-r8a77970.c | 168 #define IP1_31_28 FM(DU_DB5) F_(0, 0) F_(0, 0) FM(A15) FM(FXR_TXENA_N) F_(0, 0) F_(0, 0) F_(0,…
447 PINMUX_IPSR_GPSR(IP1_31_28, A15),
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| D | pfc-r8a77980.c | 201 #define IP1_31_28 FM(DU_DB5) FM(HTX0_A) FM(PWM0_A) FM(A15) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)…
528 PINMUX_IPSR_GPSR(IP1_31_28, A15),
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| D | pfc-r8a77990.c | 95 #define GPSR1_15 F_(A15, IP4_27_24)
254 #define IP4_27_24 FM(A15) FM(MSIOF1_SS2) FM(MSIOF2_TXD_B) FM(VI4_DATA18) FM(VI5_DATA4_A) FM(DU…
779 PINMUX_IPSR_GPSR(IP4_27_24, A15),
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| D | pfc-sh7734.c | 663 PINMUX_IPSR_GPSR(IP0_31_30, A15),
1392 GPIO_FN(A15), GPIO_FN(ST0_VCO_CLKIN), GPIO_FN(LCD_DATA15_A),
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| D | pfc-r8a7795-es1.c | 112 #define GPSR1_15 F_(A15, IP3_27_24)
286 #define IP3_27_24 FM(A15) FM(LCDOUT15) FM(MSIOF3_TXD_C) F_(0, 0) FM(HRTS4_N) FM(VI5_DATA11) FM(…
839 PINMUX_IPSR_GPSR(IP3_27_24, A15),
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| D | pfc-r8a7795.c | 113 #define GPSR1_15 F_(A15, IP3_27_24)
287 #define IP3_27_24 FM(A15) FM(LCDOUT15) FM(MSIOF3_TXD_C) F_(0, 0) FM(HRTS4_N) FM(VI5_DATA11) FM(…
846 PINMUX_IPSR_GPSR(IP3_27_24, A15),
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| D | pfc-r8a77965.c | 118 #define GPSR1_15 F_(A15, IP3_27_24)
292 #define IP3_27_24 FM(A15) FM(LCDOUT15) FM(MSIOF3_TXD_C) F_(0, 0) FM(HRTS4_N) FM(VI5_DATA11) FM(…
852 PINMUX_IPSR_GPSR(IP3_27_24, A15),
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| D | pfc-r8a7796.c | 117 #define GPSR1_15 F_(A15, IP3_27_24)
291 #define IP3_27_24 FM(A15) FM(LCDOUT15) FM(MSIOF3_TXD_C) F_(0, 0) FM(HRTS4_N) FM(VI5_DATA11) FM(…
849 PINMUX_IPSR_GPSR(IP3_27_24, A15),
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| D | pfc-r8a7792.c | 378 PINMUX_SINGLE(A15),
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| D | pfc-sh7264.c | 1273 GPIO_FN(A15),
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| D | pfc-sh7757.c | 1625 GPIO_FN(A15),
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| D | pfc-r8a77470.c | 730 PINMUX_IPSR_GPSR(IP6_3_0, A15),
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| D | pfc-sh7269.c | 1695 GPIO_FN(A15),
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| D | pfc-r8a7778.c | 587 PINMUX_IPSR_GPSR(IP0_26, A15),
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| D | pfc-r8a7794.c | 826 PINMUX_IPSR_GPSR(IP2_17_16, A15),
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| D | pfc-r8a7791.c | 874 PINMUX_IPSR_GPSR(IP1_22_20, A15),
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| D | pfc-r8a7790.c | 973 PINMUX_IPSR_GPSR(IP3_17_15, A15),
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| /drivers/pinctrl/ |
| D | pinctrl-pic32.c | 415 PIC32_PINCTRL_GROUP(15, A15,
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