Searched refs:AUX_CONTROL (Results 1 – 8 of 8) sorted by relevance
| /drivers/gpu/drm/amd/display/dc/dce/ |
| D | dce_aux.c | 99 value = REG_READ(AUX_CONTROL); in acquire_engine()
101 AUX_CONTROL, in acquire_engine()
108 AUX_CONTROL, in acquire_engine()
116 AUX_CONTROL, in acquire_engine()
120 REG_WRITE(AUX_CONTROL, value); in acquire_engine()
125 REG_WAIT(AUX_CONTROL, AUX_RESET_DONE, 1, in acquire_engine()
131 AUX_CONTROL, in acquire_engine()
134 REG_WRITE(AUX_CONTROL, value); in acquire_engine()
136 REG_WAIT(AUX_CONTROL, AUX_RESET_DONE, 0, in acquire_engine()
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| D | dce_aux.h | 34 SRI(AUX_CONTROL, DP_AUX, id), \
43 SRI(AUX_CONTROL, DP_AUX, id), \
53 uint32_t AUX_CONTROL; member
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| D | dce_link_encoder.h | 40 SRI(AUX_CONTROL, DP_AUX, id), \
108 uint32_t AUX_CONTROL; member
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| D | dce_link_encoder.c | 497 uint32_t addr = AUX_REG(AUX_CONTROL); in aux_initialize()
500 set_reg_field_value(value, hpd_source, AUX_CONTROL, AUX_HPD_SEL); in aux_initialize()
501 set_reg_field_value(value, 0, AUX_CONTROL, AUX_LS_READ_EN); in aux_initialize()
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| /drivers/gpu/drm/radeon/ |
| D | radeon_dp_auxch.c | 104 tmp = RREG32(AUX_CONTROL + aux_offset[instance]); in radeon_dp_aux_transfer_native()
110 WREG32(AUX_CONTROL + aux_offset[instance], tmp); in radeon_dp_aux_transfer_native()
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| D | nid.h | 826 #define AUX_CONTROL 0x6200 macro
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| /drivers/gpu/drm/amd/display/dc/dcn10/ |
| D | dcn10_link_encoder.h | 36 SRI(AUX_CONTROL, DP_AUX, id), \
73 uint32_t AUX_CONTROL; member
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| D | dcn10_link_encoder.c | 1393 AUX_REG_UPDATE_2(AUX_CONTROL, in dcn10_aux_initialize()
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