Searched refs:CHICKEN_PAR1_1 (Results 1 – 4 of 4) sorted by relevance
78 I915_WRITE(CHICKEN_PAR1_1, in gen9_init_clock_gating()79 I915_READ(CHICKEN_PAR1_1) | in gen9_init_clock_gating()84 I915_WRITE(CHICKEN_PAR1_1, in gen9_init_clock_gating()85 I915_READ(CHICKEN_PAR1_1) | SKL_EDP_PSR_FIX_RDWRAP); in gen9_init_clock_gating()9307 I915_WRITE(CHICKEN_PAR1_1, in bdw_init_clock_gating()9308 I915_READ(CHICKEN_PAR1_1) | DPA_MASK_VBLANK_SRD); in bdw_init_clock_gating()
7542 #define CHICKEN_PAR1_1 _MMIO(0x42080) macro
2892 MMIO_DH(CHICKEN_PAR1_1, D_SKL_PLUS, NULL, NULL); in init_skl_mmio_info()
16873 I915_WRITE(CHICKEN_PAR1_1, in intel_early_display_was()16874 I915_READ(CHICKEN_PAR1_1) | FORCE_ARB_IDLE_PLANES); in intel_early_display_was()