Home
last modified time | relevance | path

Searched refs:CLK (Results 1 – 10 of 10) sorted by relevance

/drivers/gpu/drm/amd/display/dc/gpio/
Dddc_regs.h161 DDC_REG_LIST(CLK,id)\
171 DDC_VGA_REG_LIST(CLK)\
191 DDC_REG_LIST_DCN2(CLK, id)\
/drivers/gpu/drm/msm/dsi/
Dmmss_cc.xml.h50 CLK = 0, enumerator
59 case CLK: return 0x0000004c; in __offset_CLK()
/drivers/net/ethernet/cadence/
Dmacb_main.c2113 config = GEM_BF(CLK, GEM_CLK_DIV8); in gem_mdc_clk_div()
2115 config = GEM_BF(CLK, GEM_CLK_DIV16); in gem_mdc_clk_div()
2117 config = GEM_BF(CLK, GEM_CLK_DIV32); in gem_mdc_clk_div()
2119 config = GEM_BF(CLK, GEM_CLK_DIV48); in gem_mdc_clk_div()
2121 config = GEM_BF(CLK, GEM_CLK_DIV64); in gem_mdc_clk_div()
2123 config = GEM_BF(CLK, GEM_CLK_DIV96); in gem_mdc_clk_div()
2138 config = MACB_BF(CLK, MACB_CLK_DIV8); in macb_mdc_clk_div()
2140 config = MACB_BF(CLK, MACB_CLK_DIV16); in macb_mdc_clk_div()
2142 config = MACB_BF(CLK, MACB_CLK_DIV32); in macb_mdc_clk_div()
2144 config = MACB_BF(CLK, MACB_CLK_DIV64); in macb_mdc_clk_div()
[all …]
/drivers/clk/ti/
Dclock.h93 #define CLK(dev, con, ck) \ macro
/drivers/video/fbdev/via/
Dhw.h630 void viafb_set_vclock(u32 CLK, int set_iga);
/drivers/media/dvb-frontends/
Dbcm3510_priv.h138 u8 CLK :1; member
/drivers/pinctrl/tegra/
Dpinctrl-tegra210.c1440 …PINGROUP(clk_32k_in, CLK, RSVD1, RSVD2, RSVD3, 0x3160, N, N, N, 0x…
Dpinctrl-tegra114.c1751 …PINGROUP(clk_32k_in, CLK, RSVD2, RSVD3, RSVD4, 0x3330, N, N…
Dpinctrl-tegra124.c1948 …PINGROUP(clk_32k_in, CLK, RSVD2, RSVD3, RSVD4, 0x3330, N, N…
/drivers/gpu/drm/nouveau/nvkm/engine/device/
Dbase.c2644 _(CLK , device->clk , &device->clk->subdev); in nvkm_device_subdev()