Searched refs:D3 (Results 1 – 25 of 26) sorted by relevance
12
| /drivers/soc/renesas/ |
| D | Kconfig | 231 bool "Renesas R-Car D3 SoC Platform"
235 This enables support for the Renesas R-Car D3 SoC.
305 bool "R-Car D3 System Controller support" if COMPILE_TEST
|
| /drivers/clk/renesas/ |
| D | Kconfig | 143 bool "R-Car D3 clock support" if COMPILE_TEST
|
| /drivers/pinctrl/sh-pfc/ |
| D | Kconfig | 132 bool "R-Car D3 pin control support" if COMPILE_TEST
|
| D | pfc-r8a77970.c | 197 #define IP5_19_16 FM(VI1_DATA0) FM(MSIOF1_SS1) F_(0, 0) FM(D3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0…
576 PINMUX_IPSR_GPSR(IP5_19_16, D3),
|
| D | pfc-r8a77980.c | 230 #define IP5_19_16 FM(VI1_DATA0) FM(MSIOF1_SS1) F_(0, 0) FM(D3) FM(MMC_WP) F_(0, 0) F_(0, 0) F_…
653 PINMUX_IPSR_GPSR(IP5_19_16, D3),
|
| D | pfc-r8a77990.c | 82 #define GPSR0_3 F_(D3, IP6_3_0)
264 #define IP6_3_0 FM(D3) FM(MSIOF3_TXD_A) FM(TX5_C) F_(0, 0) FM(VI5_DATA15_A) FM(DU_DR4) FM(TX4_…
855 PINMUX_IPSR_GPSR(IP6_3_0, D3),
|
| D | pfc-sh7734.c | 732 PINMUX_IPSR_GPSR(IP1_31_29, D3),
1416 GPIO_FN(D3), GPIO_FN(SD0_DAT3_A), GPIO_FN(MMC_D3_A),
|
| D | pfc-r8a7795-es1.c | 94 #define GPSR0_3 F_(D3, IP5_27_24)
302 #define IP5_27_24 FM(D3) F_(0, 0) FM(MSIOF3_TXD_A) F_(0, 0) FM(VI4_DATA19) FM(VI5_DATA3) F_(0, …
937 PINMUX_IPSR_GPSR(IP5_27_24, D3),
|
| D | pfc-r8a7795.c | 94 #define GPSR0_3 F_(D3, IP5_27_24)
303 #define IP5_27_24 FM(D3) F_(0, 0) FM(MSIOF3_TXD_A) F_(0, 0) FM(VI4_DATA19) FM(VI5_DATA3) F_(0, …
944 PINMUX_IPSR_GPSR(IP5_27_24, D3),
|
| D | pfc-r8a77965.c | 99 #define GPSR0_3 F_(D3, IP5_27_24)
308 #define IP5_27_24 FM(D3) F_(0, 0) FM(MSIOF3_TXD_A) F_(0, 0) FM(VI4_DATA19) FM(VI5_DATA3) F_(0, …
950 PINMUX_IPSR_GPSR(IP5_27_24, D3),
|
| D | pfc-r8a7796.c | 98 #define GPSR0_3 F_(D3, IP5_27_24)
307 #define IP5_27_24 FM(D3) F_(0, 0) FM(MSIOF3_TXD_A) F_(0, 0) FM(VI4_DATA19) FM(VI5_DATA3) F_(0, …
947 PINMUX_IPSR_GPSR(IP5_27_24, D3),
|
| D | pfc-r8a7792.c | 350 PINMUX_SINGLE(D3),
|
| D | pfc-sh7264.c | 1302 GPIO_FN(D3),
|
| D | pfc-r8a73a4.c | 359 F1(D3), F2(VIO_D3), F5(GIO_OUT3_219),
|
| D | pfc-sh7757.c | 1661 GPIO_FN(D3),
|
| D | pfc-sh7724.c | 1406 GPIO_FN(D3),
|
| D | pfc-r8a77470.c | 589 PINMUX_IPSR_GPSR(IP1_23_20, D3),
|
| D | pfc-sh7269.c | 1724 GPIO_FN(D3),
|
| D | pfc-r8a7778.c | 691 PINMUX_IPSR_NOGP(IP2_21, D3),
|
| D | pfc-r8a7794.c | 735 PINMUX_IPSR_GPSR(IP0_27_26, D3),
|
| D | pfc-r8a7791.c | 814 PINMUX_IPSR_GPSR(IP0_3, D3),
|
| /drivers/pinctrl/aspeed/ |
| D | pinctrl-aspeed-g6.c | 1374 #define D3 223 macro
1375 SIG_EXPR_LIST_DECL_SESG(D3, RGMII2TXD1, RGMII2, SIG_DESC_SET(SCU400, 15),
1377 SIG_EXPR_LIST_DECL_SESG(D3, RMII2TXD1, RMII2, SIG_DESC_SET(SCU400, 15),
1379 PIN_DECL_2(D3, GPIO18B7, RGMII2TXD1, RMII2TXD1);
1431 FUNC_GROUP_DECL(RGMII2, D4, C2, C1, D3, E4, F5, D2, E3, D1, F4, E2, E1);
1432 FUNC_GROUP_DECL(RMII2, D4, C2, C1, D3, D2, D1, F4, E2, E1);
1695 ASPEED_PINCTRL_PIN(D3),
|
| D | pinctrl-aspeed-g4.c | 1056 #define D3 128 macro
1057 SIG_EXPR_LIST_DECL_SINGLE(D3, SCL3, I2C3, I2C3_DESC);
1058 PIN_DECL_1(D3, GPIOQ0, SCL3);
1064 FUNC_GROUP_DECL(I2C3, D3, C2);
1997 ASPEED_PINCTRL_PIN(D3),
|
| /drivers/pinctrl/ |
| D | pinctrl-pic32.c | 952 PIC32_PINCTRL_GROUP(51, D3,
|
| /drivers/platform/x86/ |
| D | Kconfig | 1300 turn the ISP off (put it in D3) to save power and to allow entering
|
12