| /drivers/pinctrl/aspeed/ |
| D | pinctrl-aspeed-g5.c | 1218 #define D4 163 macro
1219 SIG_EXPR_LIST_DECL_SINGLE(D4, GPIOU3, GPIOU3, SIG_DESC_SET(SCUA0, 11));
1220 SIG_EXPR_LIST_DECL_SINGLE(D4, RMII2DASH1, RMII2, RMII2_DESC);
1221 SIG_EXPR_LIST_DECL_SINGLE(D4, RGMII2TXD3, RGMII2);
1222 PIN_DECL_(D4, SIG_EXPR_LIST_PTR(D4, GPIOU3), SIG_EXPR_LIST_PTR(D4, RMII2DASH1),
1223 SIG_EXPR_LIST_PTR(D4, RGMII2TXD3));
1312 FUNC_GROUP_DECL(RGMII2, B2, B1, A2, B3, D5, D4, C2, C1, C3, D1, D2, E6);
1988 ASPEED_PINCTRL_PIN(D4),
2553 { PIN_CONFIG_BIAS_PULL_DOWN, { B2, D4 }, SCU90, 14 },
2554 { PIN_CONFIG_BIAS_DISABLE, { B2, D4 }, SCU90, 14 },
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| D | pinctrl-aspeed-g6.c | 1353 #define D4 220 macro
1354 SIG_EXPR_LIST_DECL_SESG(D4, RGMII2TXCK, RGMII2, SIG_DESC_SET(SCU400, 12),
1356 SIG_EXPR_LIST_DECL_SESG(D4, RMII2RCLKO, RMII2, SIG_DESC_SET(SCU400, 12),
1358 PIN_DECL_2(D4, GPIO18B4, RGMII2TXCK, RMII2RCLKO);
1431 FUNC_GROUP_DECL(RGMII2, D4, C2, C1, D3, E4, F5, D2, E3, D1, F4, E2, E1);
1432 FUNC_GROUP_DECL(RMII2, D4, C2, C1, D3, D2, D1, F4, E2, E1);
1696 ASPEED_PINCTRL_PIN(D4),
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| D | pinctrl-aspeed-g4.c | 197 #define D4 20 macro
198 SIG_EXPR_LIST_DECL_SINGLE(D4, SD1DAT2, SD1, SD1_DESC);
199 SIG_EXPR_LIST_DECL_SINGLE(D4, SCL12, I2C12, I2C12_DESC);
200 PIN_DECL_2(D4, GPIOC4, SD1DAT2, SCL12);
207 FUNC_GROUP_DECL(I2C12, D4, C3);
222 FUNC_GROUP_DECL(SD1, C4, B3, A2, E5, D4, C3, B2, A1);
1998 ASPEED_PINCTRL_PIN(D4),
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| /drivers/pinctrl/sh-pfc/ |
| D | pfc-r8a77970.c | 198 #define IP5_23_20 FM(VI1_DATA1) FM(MSIOF1_SS2) F_(0, 0) FM(D4) FM(MMC_CMD) F_(0, 0) F_(0, 0) F…
580 PINMUX_IPSR_GPSR(IP5_23_20, D4),
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| D | pfc-r8a77980.c | 231 #define IP5_23_20 FM(VI1_DATA1) FM(MSIOF1_SS2) F_(0, 0) FM(D4) FM(MMC_CD) F_(0, 0) F_(0, 0) F_…
658 PINMUX_IPSR_GPSR(IP5_23_20, D4),
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| D | pfc-r8a77990.c | 81 #define GPSR0_4 F_(D4, IP6_7_4)
265 #define IP6_7_4 FM(D4) FM(CANFD1_TX) FM(HSCK3_B) FM(CAN1_TX) FM(RTS3_N_A) FM(MSIOF3_SS2_A) F…
863 PINMUX_IPSR_GPSR(IP6_7_4, D4),
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| D | pfc-sh7734.c | 739 PINMUX_IPSR_GPSR(IP2_2_0, D4),
1420 GPIO_FN(D4), GPIO_FN(SD0_CD_A), GPIO_FN(MMC_D4_A), GPIO_FN(ST1_D7),
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| D | pfc-r8a7795-es1.c | 93 #define GPSR0_4 F_(D4, IP5_31_28)
303 #define IP5_31_28 FM(D4) FM(MSIOF2_SCK_B)F_(0, 0) F_(0, 0) FM(VI4_DATA20) FM(VI5_DATA4) F_(0, …
942 PINMUX_IPSR_GPSR(IP5_31_28, D4),
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| D | pfc-r8a7795.c | 93 #define GPSR0_4 F_(D4, IP5_31_28)
304 #define IP5_31_28 FM(D4) FM(MSIOF2_SCK_B)F_(0, 0) F_(0, 0) FM(VI4_DATA20) FM(VI5_DATA4) F_(0, …
949 PINMUX_IPSR_GPSR(IP5_31_28, D4),
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| D | pfc-r8a77965.c | 98 #define GPSR0_4 F_(D4, IP5_31_28)
309 #define IP5_31_28 FM(D4) FM(MSIOF2_SCK_B)F_(0, 0) F_(0, 0) FM(VI4_DATA20) FM(VI5_DATA4) F_(0, …
955 PINMUX_IPSR_GPSR(IP5_31_28, D4),
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| D | pfc-r8a7796.c | 97 #define GPSR0_4 F_(D4, IP5_31_28)
308 #define IP5_31_28 FM(D4) FM(MSIOF2_SCK_B)F_(0, 0) F_(0, 0) FM(VI4_DATA20) FM(VI5_DATA4) F_(0, …
952 PINMUX_IPSR_GPSR(IP5_31_28, D4),
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| D | pfc-r8a7792.c | 351 PINMUX_SINGLE(D4),
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| D | pfc-sh7264.c | 1301 GPIO_FN(D4),
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| D | pfc-r8a73a4.c | 358 F1(D4), F2(VIO_D4), F5(GIO_OUT4_218),
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| D | pfc-sh7757.c | 1660 GPIO_FN(D4),
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| D | pfc-sh7724.c | 1405 GPIO_FN(D4),
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| D | pfc-r8a77470.c | 594 PINMUX_IPSR_GPSR(IP1_27_24, D4),
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| D | pfc-sh7269.c | 1723 GPIO_FN(D4),
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| D | pfc-r8a7778.c | 692 PINMUX_IPSR_NOGP(IP2_22, D4),
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| D | pfc-r8a7794.c | 738 PINMUX_IPSR_GPSR(IP0_29_28, D4),
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| D | pfc-r8a7791.c | 815 PINMUX_IPSR_GPSR(IP0_4, D4),
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| D | pfc-r8a7790.c | 822 PINMUX_IPSR_GPSR(IP0_15_12, D4),
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| /drivers/pinctrl/ |
| D | pinctrl-pic32.c | 976 PIC32_PINCTRL_GROUP(52, D4,
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