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Searched refs:D6 (Results 1 – 23 of 23) sorted by relevance

/drivers/pinctrl/aspeed/
Dpinctrl-aspeed-g5.c1246 #define D6 167 macro
1247 SIG_EXPR_LIST_DECL_SINGLE(D6, GPIOU7, GPIOU7, SIG_DESC_SET(SCUA0, 15));
1248 SIG_EXPR_LIST_DECL_SINGLE(D6, RMII1RXD1, RMII1, RMII1_DESC);
1249 SIG_EXPR_LIST_DECL_SINGLE(D6, RGMII1RXD1, RGMII1);
1250 PIN_DECL_(D6, SIG_EXPR_LIST_PTR(D6, GPIOU7), SIG_EXPR_LIST_PTR(D6, RMII1RXD1),
1251 SIG_EXPR_LIST_PTR(D6, RGMII1RXD1));
1267 FUNC_GROUP_DECL(RGMII1, B4, A4, A3, D6, C5, C4, B5, E9, F9, A5, E7, D7);
1268 FUNC_GROUP_DECL(RMII1, B4, A3, D6, C5, C4, B5, E9, F9, A5);
1990 ASPEED_PINCTRL_PIN(D6),
Dpinctrl-aspeed-g6.c1279 #define D6 209 macro
1280 SIG_EXPR_LIST_DECL_SESG(D6, RGMII1TXCTL, RGMII1, SIG_DESC_SET(SCU400, 1),
1282 SIG_EXPR_LIST_DECL_SESG(D6, RMII1TXEN, RMII1, SIG_DESC_SET(SCU400, 1),
1284 PIN_DECL_2(D6, GPIO18A1, RGMII1TXCTL, RMII1TXEN);
1350 FUNC_GROUP_DECL(RGMII1, C6, D6, D5, A3, C5, E6, B3, A2, B2, B1, C4, E5);
1351 FUNC_GROUP_DECL(RMII1, C6, D6, D5, A3, B3, B2, B1, C4, E5);
1698 ASPEED_PINCTRL_PIN(D6),
Dpinctrl-aspeed-g4.c75 #define D6 0 macro
76 SSSF_PIN_DECL(D6, GPIOA0, MAC1LINK, SIG_DESC_SET(SCU80, 0));
2000 ASPEED_PINCTRL_PIN(D6),
2442 { PIN_CONFIG_BIAS_PULL_DOWN, { D6, D5 }, SCU8C, 16 },
2443 { PIN_CONFIG_BIAS_DISABLE, { D6, D5 }, SCU8C, 16 },
/drivers/pinctrl/sh-pfc/
Dpfc-r8a77970.c200 #define IP5_31_28 FM(VI1_DATA3) FM(CANFD0_RX_B) F_(0, 0) FM(D6) FM(MMC_D1) F_(0, 0) F_(0, 0) F…
590 PINMUX_IPSR_GPSR(IP5_31_28, D6),
Dpfc-r8a77980.c233 #define IP5_31_28 FM(VI1_DATA3) FM(CANFD0_RX_B) F_(0, 0) FM(D6) FM(MMC_CMD) F_(0, 0) F_(0, 0) …
668 PINMUX_IPSR_GPSR(IP5_31_28, D6),
Dpfc-r8a77990.c79 #define GPSR0_6 F_(D6, IP6_15_12)
267 #define IP6_15_12 FM(D6) FM(TX3_A) FM(HTX3_B) F_(0, 0) F_(0, 0) FM(DU_DR6) FM(VI4_DATA5_B) F_…
878 PINMUX_IPSR_GPSR(IP6_15_12, D6),
Dpfc-sh7734.c750 PINMUX_IPSR_GPSR(IP2_7_5, D6),
1423 GPIO_FN(D6), GPIO_FN(RSPI_RSPCK_A), GPIO_FN(MMC_D6_A),
Dpfc-r8a7795-es1.c91 #define GPSR0_6 F_(D6, IP6_7_4)
305 #define IP6_7_4 FM(D6) FM(MSIOF2_RXD_B)F_(0, 0) F_(0, 0) FM(VI4_DATA22) FM(VI5_DATA6) F_(0, 0…
953 PINMUX_IPSR_GPSR(IP6_7_4, D6),
Dpfc-r8a7795.c91 #define GPSR0_6 F_(D6, IP6_7_4)
306 #define IP6_7_4 FM(D6) FM(MSIOF2_RXD_B)F_(0, 0) F_(0, 0) FM(VI4_DATA22) FM(VI5_DATA6) F_(0, 0…
960 PINMUX_IPSR_GPSR(IP6_7_4, D6),
Dpfc-r8a77965.c96 #define GPSR0_6 F_(D6, IP6_7_4)
311 #define IP6_7_4 FM(D6) FM(MSIOF2_RXD_B)F_(0, 0) F_(0, 0) FM(VI4_DATA22) FM(VI5_DATA6) F_(0, 0…
966 PINMUX_IPSR_GPSR(IP6_7_4, D6),
Dpfc-r8a7796.c95 #define GPSR0_6 F_(D6, IP6_7_4)
310 #define IP6_7_4 FM(D6) FM(MSIOF2_RXD_B)F_(0, 0) F_(0, 0) FM(VI4_DATA22) FM(VI5_DATA6) F_(0, 0…
963 PINMUX_IPSR_GPSR(IP6_7_4, D6),
Dpfc-r8a7792.c353 PINMUX_SINGLE(D6),
Dpfc-sh7264.c1299 GPIO_FN(D6),
Dpfc-r8a73a4.c356 F1(D6), F2(VIO_D6), F5(GIO_OUT6),
Dpfc-sh7757.c1658 GPIO_FN(D6),
Dpfc-sh7724.c1403 GPIO_FN(D6),
Dpfc-r8a77470.c605 PINMUX_IPSR_GPSR(IP2_3_0, D6),
Dpfc-sh7269.c1721 GPIO_FN(D6),
Dpfc-r8a7778.c694 PINMUX_IPSR_NOGP(IP2_24, D6),
Dpfc-r8a7794.c746 PINMUX_IPSR_GPSR(IP1_1_0, D6),
Dpfc-r8a7791.c817 PINMUX_IPSR_GPSR(IP0_6, D6),
Dpfc-r8a7790.c836 PINMUX_IPSR_GPSR(IP0_22_20, D6),
/drivers/pinctrl/
Dpinctrl-pic32.c1027 PIC32_PINCTRL_GROUP(54, D6,